On 09/11/16 02:13, Aneesh Kumar K.V wrote:
> Balbir Singh writes:
>
>> AMOR should be setup in HV mode, we set it up once
>> and let the generic kernel handle IAMR. This patch is
>> used to enable storage keys in a following patch as
>> defined in ISA 3
>>
>> Reported-by: Aneesh Kumar K.V
>> S
On 09/11/16 03:09, Aneesh Kumar K.V wrote:
> Balbir Singh writes:
>
>> ISA 3 allows for prevention of instruction fetch and execution
>> of user mode pages. If such an error occurs, SRR1 bit 35
>> reports the error. We catch and report the error in do_page_fault()
>>
>> Signed-off-by: Balbir Si
On Thu, 2016-11-10 at 21:36 +1100, Michael Ellerman wrote:
> Suraj Jitindar Singh writes:
>
> >
> > On Tue, 2016-11-08 at 19:21 +1100, Michael Ellerman wrote:
> > >
> > > Suraj Jitindar Singh writes:
> > >
> > > >
> > > >
> > > > ISA 3.00 adds the logical PVR value 0x0f05, so add a
> >
On 09/11/16 03:15, Aneesh Kumar K.V wrote:
> Balbir Singh writes:
>
>> ISA 3 defines new encoded access authority that allows instruction
>> access prevention in privileged mode and allows normal access
>> to problem state. This patch just enables IAMR (Instruction Authority
>> Mask Register),
This changes the way that we support the new ISA v3.00 HPTE format.
Instead of adapting everything that uses HPTE values to handle either
the old format or the new format, depending on which CPU we are on,
we now convert explicitly between old and new formats if necessary
in the low-level routines
On Thu, Nov 10, 2016 at 02:54:23PM +0530, Aneesh Kumar K.V wrote:
> They differ between powernv and pseries. While we are at it copy
> a version for ps3 too. For now this is same as what we have for pSeries.
>
> Fixes: 50de596de8be6 ("powerpc/mm/hash: Add support for Power9 Hash")
This seems like
Benjamin Herrenschmidt writes:
> On Thu, 2016-11-10 at 14:59 +0530, Aneesh Kumar K.V wrote:
>> This help us to find the hugetlb page size which we need ot use on some
>> archs like ppc64 for tlbflush. This also make the interface consistent
>> with other hugetlb functions
>
> What about my reques
On Fri, 11 Nov 2016 12:00:14 +1100
Alistair Popple wrote:
> On Wed, 9 Nov 2016 01:01:24 AM Nicholas Piggin wrote:
> > Allow platforms to provide an NMI IPI, and wire that to the NMI
> > system.
> > ---
> > arch/powerpc/include/asm/smp.h| 5 +
> > arch/powerpc/kernel/smp.c
Balbir Singh writes:
> On 11/11/16 10:54, Balbir Singh wrote:
>>
>>
>> On 10/11/16 20:24, Aneesh Kumar K.V wrote:
>>> They differ between powernv and pseries. While we are at it copy
>>> a version for ps3 too. For now this is same as what we have for pSeries.
>>>
>>> Fixes: 50de596de8be6 ("powe
On 08/11/16 10:44, Reza Arbab wrote:
> When movable nodes are enabled, any node containing only hotpluggable
> memory is made movable at boot time.
>
> On x86, hotpluggable memory is discovered by parsing the ACPI SRAT,
> making corresponding calls to memblock_mark_hotplug().
>
> If we introduc
On 11/11/16 10:54, Balbir Singh wrote:
>
>
> On 10/11/16 20:24, Aneesh Kumar K.V wrote:
>> They differ between powernv and pseries. While we are at it copy
>> a version for ps3 too. For now this is same as what we have for pSeries.
>>
>> Fixes: 50de596de8be6 ("powerpc/mm/hash: Add support for P
On Wed, 9 Nov 2016 01:01:24 AM Nicholas Piggin wrote:
> Allow platforms to provide an NMI IPI, and wire that to the NMI
> system.
> ---
> arch/powerpc/include/asm/smp.h| 5 +
> arch/powerpc/kernel/smp.c | 21 -
> arch/powerpc/platforms/85xx/smp.
On 10/11/16 20:24, Aneesh Kumar K.V wrote:
> They differ between powernv and pseries. While we are at it copy
> a version for ps3 too. For now this is same as what we have for pSeries.
>
> Fixes: 50de596de8be6 ("powerpc/mm/hash: Add support for Power9 Hash")
> Signed-off-by: Aneesh Kumar K.V
On Wed, 2016-11-09 at 19:04 +, Mark Rutland wrote:
>
>
> If we don't have an interrupt-map on a PCI controller, why don't we
> instead log a message regarding that being missing, and give up
> early?
Why ? It's legit to not support LSIs.
> That sounds like a more generically useful error me
On Wed, 2016-11-09 at 12:05 -0200, Guilherme G. Piccoli wrote:
> diff --git a/drivers/of/irq.c b/drivers/of/irq.c
> index 393fea8..1ad6882 100644
> --- a/drivers/of/irq.c
> +++ b/drivers/of/irq.c
> @@ -275,7 +275,10 @@ int of_irq_parse_raw(const __be32 *addr, struct
> of_phandle_args *out_irq)
>
On Thu, Nov 10, 2016 at 11:56:02AM +1100, Balbir Singh wrote:
Have you tested this across all combinations of skiboot/kexec/SLOF
boots?
I've tested it under qemu/grub, simics/skiboot, and via kexec.
--
Reza Arbab
On Thu, 2016-11-10 at 14:59 +0530, Aneesh Kumar K.V wrote:
> This help us to find the hugetlb page size which we need ot use on some
> archs like ppc64 for tlbflush. This also make the interface consistent
> with other hugetlb functions
What about my requested simpler approach ?
For normal (non-h
From: Andreas Steffen
For remote attestion it is important for the ima measurement values
to be platform-independent. Therefore integer fields to be hashed
must be converted to canonical format.
Changelog:
- Define canonical format as little endian (Mimi)
Signed-off-by: Andreas Steffen
Signed-
The TPM PCRs are only reset on a hard reboot. In order to validate a
TPM's quote after a soft reboot (eg. kexec -e), the IMA measurement list
of the running kernel must be saved and restored on boot.
This patch uses the kexec buffer passing mechanism to pass the
serialized IMA binary_runtime_meas
From: Thiago Jung Bauermann
The IMA kexec buffer allows the currently running kernel to pass
the measurement list via a kexec segment to the kernel that will be
kexec'd. The second kernel can check whether the previous kernel sent
the buffer and retrieve it.
This is the architecture-specific par
The IMA binary_runtime_measurements list is currently in platform native
format.
To allow restoring a measurement list carried across kexec with a
different endianness than the targeted kernel, this patch defines
little-endian as the canonical format. For big endian systems wanting
to save/restor
The configured IMA measurement list template format can be replaced at
runtime on the boot command line, including a custom template format.
This patch adds support for restoring a measuremement list containing
multiple builtin/custom template formats.
Changelog v7:
- remove unnecessary "synchroni
The TPM PCRs are only reset on a hard reboot. In order to validate a
TPM's quote after a soft reboot (eg. kexec -e), the IMA measurement list
of the running kernel must be saved and restored on boot. This patch
restores the measurement list.
Changelog v7:
- add and fix missing buffer length chec
The builtin and single custom templates are currently stored in an
array. In preparation for being able to restore a measurement list
containing multiple builtin/custom templates, this patch stores the
builtin and custom templates as a linked list. This will permit
defining more than one custom t
From: Thiago Jung Bauermann
The IMA kexec buffer allows the currently running kernel to pass
the measurement list via a kexec segment to the kernel that will be
kexec'd.
This is the architecture-specific part of setting up the IMA kexec
buffer for the next kernel. It will be used in the next pat
In preparation for serializing the binary_runtime_measurements, this patch
maintains the amount of memory required.
Changelog v7:
- include the trailing null in the string length (reported by Dmitry Kasatkin)
Changelog v5:
- replace CONFIG_KEXEC_FILE with architecture CONFIG_HAVE_IMA_KEXEC (Thiag
Measurements carried across kexec need to be added to the IMA
measurement list, but should not prevent measurements of the newly
booted kernel from being added to the measurement list. This patch
adds support for allowing duplicate measurements.
The "boot_aggregate" measurement entry is the delimi
[Posting with abbreviated Cc list.]
The TPM PCRs are only reset on a hard reboot. In order to validate a
TPM's quote after a soft reboot (eg. kexec -e), the IMA measurement list
of the running kernel must be saved and then restored on the subsequent
boot, possibly of a different architecture.
Th
Hi Hari,
[auto build test WARNING on linus/master]
[also build test WARNING on v4.9-rc4]
[cannot apply to powerpc/next next-20161110]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Hari-Bathini
On Tue, 2016-11-08 at 15:47 -0500, Mimi Zohar wrote:
> On Tue, 2016-11-08 at 21:46 +0200, Dmitry Kasatkin wrote:
> > On Fri, Oct 21, 2016 at 5:44 AM, Thiago Jung Bauermann
> > > +/* Restore the serialized binary measurement list without extending
> > > PCRs. */
> > > +int ima_restore_measurement_
As we are reusing crashkernel parameter instead of fadump_reserve_mem
parameter to specify the memory to reserve for fadump's crash kernel,
update the documentation accordingly.
Signed-off-by: Hari Bathini
---
Documentation/powerpc/firmware-assisted-dump.txt | 23 ++
1 file
fadump supports specifying memory to reserve for fadump's crash kernel
with fadump_reserve_mem kernel parameter. This parameter currently
supports passing a fixed memory size, like fadump_reserve_mem=
only. This patch aims to add support for other syntaxes like range-based
memory size :[,:,:,...]
w
Traditionally, kdump is used to save vmcore in case of a crash. Some
architectures like powerpc can save vmcore using architecture specific
support instead of kexec/kdump mechanism. Such architecture specific
support also needs to reserve memory, to be used by dump capture kernel.
crashkernel param
Traditionally, kdump is used to save vmcore in case of a crash. Some
architectures like powerpc can save vmcore using architecture specific
support instead of kexec/kdump mechanism. Such architecture specific
support also needs to reserve memory, to be used by dump capture kernel.
crashkernel param
On Thursday, November 10, 2016 11:19:20 AM CET Geert Uytterhoeven wrote:
> Hi Arnd,
>
> Thanks for your comments!
>
> On Wed, Nov 9, 2016 at 5:55 PM, Arnd Bergmann wrote:
> > On Monday, October 31, 2016 12:30:55 PM CET Geert Uytterhoeven wrote:
> >> v2:
> >> - Drop SoC families and family name
On 10 November 2016 at 10:22, Geert Uytterhoeven wrote:
> Hi Ulf,
>
> On Wed, Nov 9, 2016 at 10:12 PM, Arnd Bergmann wrote:
>> On Wednesday, November 9, 2016 6:19:06 PM CET Geert Uytterhoeven wrote:
>>> On Wed, Nov 9, 2016 at 5:56 PM, Arnd Bergmann wrote:
>>> > On Wednesday, November 9, 2016 2:3
On Thu, Nov 10, 2016 at 10:22 AM, Geert Uytterhoeven
wrote:
> Thanks, I've created the branch/tag :
>
> git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git
> branch soc-device-match
> signed tag soc-device-match-tag1
Tested by kbuild test robot:
https://git.ke
Suraj Jitindar Singh writes:
> On Tue, 2016-11-08 at 19:21 +1100, Michael Ellerman wrote:
>> Suraj Jitindar Singh writes:
>>
>> >
>> > ISA 3.00 adds the logical PVR value 0x0f05, so add a definition
>> > for
>> > this.
>> >
>> > Define PCR_ARCH_207 to reflect ISA 2.07 compatibility mode i
Nicholas Piggin writes:
> On Thu, 10 Nov 2016 12:35:59 +1100
> Michael Ellerman wrote:
>
>> Nicholas Piggin writes:
>>
>> > When exiting xmon with 'x' (exit and recover), oops_begin bails
>> > out immediately, but die then calls __die() and oops_end(), which
>> > cause a lot of bad things to h
Hi Arnd,
Thanks for your comments!
On Wed, Nov 9, 2016 at 5:55 PM, Arnd Bergmann wrote:
> On Monday, October 31, 2016 12:30:55 PM CET Geert Uytterhoeven wrote:
>> v2:
>> - Drop SoC families and family names; use fixed "Renesas" instead,
>
> I think I'd rather have seen the family names left in
Suraj Jitindar Singh writes:
> Version 3.00 of the ISA states that the PATS (partition table size) field
> of the PTCR (partition table control register) and the PRTS (process table
> size) field of the partition table entry must both be less than or equal
> to 24. However the actual size of the
This help us to find the hugetlb page size which we need ot use on some
archs like ppc64 for tlbflush. This also make the interface consistent
with other hugetlb functions
Signed-off-by: Aneesh Kumar K.V
---
arch/arm/include/asm/hugetlb-3level.h| 8
arch/arm64/include/asm/huget
When we are updating pte, we just need to flush the tlb mapping for
that pte. Right now we do a full mm flush because we don't track page
size. Update the interface to track the page size and use that to
do the right tlb flush.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/
We will start moving some book3s specific hugetlb functions there.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/{hugetlb-radix.h => hugetlb.h} | 6 --
arch/powerpc/include/asm/hugetlb.h| 2 +-
2 files changed, 5 insertions(+), 3 delet
When we are updating pte, we just need to flush the tlb mapping for
that pte. Right now we do a full mm flush because we don't track page
size. Update the interface to track the page size and use that to
do the right tlb flush.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/
Hi Ulf,
On Wed, Nov 9, 2016 at 7:27 PM, Ulf Hansson wrote:
> On 9 November 2016 at 04:14, Yangbo Lu wrote:
>> This patchset is used to fix a host version register bug in the
>> T4240-R1.0-R2.0
>> eSDHC controller. To match the SoC version and revision, 15 previous version
>> patchsets had tried
They differ between powernv and pseries. While we are at it copy
a version for ps3 too. For now this is same as what we have for pSeries.
Fixes: 50de596de8be6 ("powerpc/mm/hash: Add support for Power9 Hash")
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/mmu-hash.h | 61 -
Hi Ulf,
On Wed, Nov 9, 2016 at 10:12 PM, Arnd Bergmann wrote:
> On Wednesday, November 9, 2016 6:19:06 PM CET Geert Uytterhoeven wrote:
>> On Wed, Nov 9, 2016 at 5:56 PM, Arnd Bergmann wrote:
>> > On Wednesday, November 9, 2016 2:34:33 PM CET Geert Uytterhoeven wrote:
>> >> > And Samsung.
>> >>
From: "Gautham R. Shenoy"
The power9_idle_stop method currently takes only the requested stop
level as a parameter and picks up the rest of the PSSCR bits from a
hand-coded macro. This is not a very flexible design, especially when
the firmware has the capability to communicate the psscr value an
From: "Gautham R. Shenoy"
Currently all the low-power idle states are expected to wake up
at reset vector 0x100. Which is why the macro IDLE_STATE_ENTER_SEQ
that puts the CPU to an idle state and never returns.
On ISA_300, when the ESL and EC bits in the PSSCR are zero, the
CPU is expected to wa
From: "Gautham R. Shenoy"
In the current code for powernv_add_idle_states, there is a lot of code
duplication while initializing an idle state in powernv_states table.
Add an inline helper function to populate the powernv_states[] table for
a given idle state. Invoke this for populating the "Nap
From: "Gautham R. Shenoy"
This is the third iteration of the patchset to use the psscr_val and
psscr_mask provided by the firmware for each of the stop states.
The previous version can be found here:
[v2]: https://lkml.org/lkml/2016/10/27/143
[v1]: https://lkml.org/lkml/2016/9/29/45
This versi
52 matches
Mail list logo
