Whoops!
Acked-by: Ian Munsie
___
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Commit f67a6722d650 ("cxl: Workaround PE=0 hardware limitation in Mellanox
CX4") added a "min_pe" field to struct cxl_service_layer_ops, to allow us
to work around a Mellanox CX-4 hardware limitation.
When allocating the PE number in cxl_context_init(), we read from
ctx->afu->adapter->native->sl_o
On EEH events the kernel will print a dump of relevant registers.
If EEH is unavailable (i.e. CONFIG_EEH is disabled, a new platform
doesn't have EEH support, etc) this information isn't readily available.
Add a new debugfs handler to trigger a PHB register dump, so that this
information can be ma
On 28/07/16 00:18, Michael Ellerman wrote:
> Like we just did for hash, split the device tree scanning parts out and
> call them from mmu_early_init_devtree().
>
> Signed-off-by: Michael Ellerman
> ---
> arch/powerpc/include/asm/book3s/64/mmu.h | 1 +
> arch/powerpc/mm/init_64.c
On 28/07/16 00:17, Michael Ellerman wrote:
> Move the handling of the disable_radix command line argument into the
> newly created mmu_early_init_devtree().
>
> It's an MMU option so it's preferable to have it in an mm related file,
> and it also means platforms that don't support radix don't ha
From: Anshuman Khandual
Fixes the following build failure -
cp_abort.c:90:3: error: ‘for’ loop initial declarations are only
allowed in C99 or C11 mode
for (int i = 0; i < NUM_LOOPS; i++) {
^
cp_abort.c:90:3: note: use option -std=c99, -std=gnu99, -std=c11 or
-std=gnu11 to compile your cod
From: Anshuman Khandual
This patch adds a .gitignore file for all the executables in
the ptrace test directory thus making invisible with git status
query.
Signed-off-by: Anshuman Khandual
Signed-off-by: Simon Guo
---
tools/testing/selftests/powerpc/ptrace/.gitignore | 11 +++
1 file
From: Anshuman Khandual
This patch adds ptrace interface test for TM SPR registers. This
also adds ptrace interface based helper functions related to TM
SPR registers access.
Signed-off-by: Anshuman Khandual
Signed-off-by: Simon Guo
---
tools/testing/selftests/powerpc/ptrace/Makefile| 3
From: Anshuman Khandual
This patch adds ptrace interface test for VSX, VMX registers
inside suspended TM context.
Signed-off-by: Anshuman Khandual
Signed-off-by: Simon Guo
---
tools/testing/selftests/powerpc/ptrace/Makefile| 3 +-
.../selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c | 222
From: Anshuman Khandual
This patch adds ptrace interface test for VSX, VMX registers
inside TM context. This also adds ptrace interface based helper
functions related to chckpointed VSX, VMX registers access.
Signed-off-by: Anshuman Khandual
Signed-off-by: Simon Guo
---
tools/testing/selftest
From: Anshuman Khandual
This patch adds ptrace interface test for VSX, VMX registers.
This also adds ptrace interface based helper functions related
to VSX, VMX registers access. This also adds some assembly
helper functions related to VSX and VMX registers.
Signed-off-by: Anshuman Khandual
Sig
From: Anshuman Khandual
This patch adds ptrace interface test for TAR, PPR, DSCR
registers inside suspended TM context.
Signed-off-by: Anshuman Khandual
Signed-off-by: Simon Guo
---
tools/testing/selftests/powerpc/ptrace/Makefile| 2 +-
.../selftests/powerpc/ptrace/ptrace-tm-spd-tar.c
From: Anshuman Khandual
This patch adds ptrace interface test for TAR, PPR, DSCR
registers inside TM context. This also adds ptrace
interface based helper functions related to checkpointed
TAR, PPR, DSCR register access.
Signed-off-by: Anshuman Khandual
Signed-off-by: Simon Guo
---
tools/test
From: Anshuman Khandual
This patch adds ptrace interface test for TAR, PPR, DSCR
registers. This also adds ptrace interface based helper
functions related to TAR, PPR, DSCR register access.
Signed-off-by: Anshuman Khandual
Signed-off-by: Simon Guo
---
tools/testing/selftests/powerpc/ptrace/Ma
From: Anshuman Khandual
This patch adds ptrace interface test for GPR/FPR registers
inside suspended TM context.
Signed-off-by: Anshuman Khandual
Signed-off-by: Simon Guo
---
tools/testing/selftests/powerpc/ptrace/Makefile| 2 +-
.../selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c | 327
From: Anshuman Khandual
This patch adds ptrace interface test for GPR/FPR registers
inside TM context. This adds ptrace interface based helper
functions related to checkpointed GPR/FPR access.
Signed-off-by: Anshuman Khandual
Signed-off-by: Simon Guo
---
tools/testing/selftests/powerpc/ptrace
From: Anshuman Khandual
This patch adds ptrace interface test for GPR/FPR registers.
This adds ptrace interface based helper functions related to
GPR/FPR access and some assembly helper functions related to
GPR/FPR registers.
Signed-off-by: Anshuman Khandual
Signed-off-by: Simon Guo
---
tools
From: Anshuman Khandual
This patch adds ptrace interface test for EBB/PMU specific
registers. This also adds some generic ptrace interface
based helper functions to be used by other patches later
on in the series.
Signed-off-by: Anshuman Khandual
Signed-off-by: Simon Guo
---
tools/testing/sel
From: Anshuman Khandual
Now that the new DSCR register definitions (SPRN_DSCR_PRIV and
SPRN_DSCR) are defined outside this directory, use them instead.
Signed-off-by: Anshuman Khandual
Signed-off-by: Simon Guo
---
tools/testing/selftests/powerpc/dscr/dscr.h | 10 --
1 file changed, 4
From: Anshuman Khandual
This patch adds SPR number for TAR, PPR, DSCR special
purpose registers. It also adds TM, VSX, VMX related
instructions which will then be used by patches later
in the series.
Signed-off-by: Anshuman Khandual
Signed-off-by: Simon Guo
---
tools/testing/selftests/powerpc
From: Anshuman Khandual
This patch enables support for Performance monitor registers related
ELF core note NT_PPC_PMU based ptrace requests through
PTRACE_GETREGSET, PTRACE_SETREGSET calls. This is achieved
through adding one new register sets REGSET_PMU in powerpc
corresponding to the ELF core n
From: Anshuman Khandual
This patch enables support for EBB state registers related
ELF core note NT_PPC_EBB based ptrace requests through
PTRACE_GETREGSET, PTRACE_SETREGSET calls. This is achieved
through adding one new register sets REGSET_EBB in powerpc
corresponding to the ELF core note sectio
From: Anshuman Khandual
This patch enables support for running TAR, PPR, DSCR registers
related ELF core notes NT_PPPC_TAR, NT_PPC_PPR, NT_PPC_DSCR based
ptrace requests through PTRACE_GETREGSET, PTRACE_SETREGSET calls.
This is achieved through adding three new register sets REGSET_TAR,
REGSET_PP
From: Anshuman Khandual
This patch enables support for all three TM checkpointed SPR
states related ELF core note NT_PPC_TM_CTAR, NT_PPC_TM_CPPR,
NT_PPC_TM_CDSCR based ptrace requests through PTRACE_GETREGSET,
PTRACE_SETREGSET calls. This is achieved through adding three
new register sets REGSET
From: Anshuman Khandual
This patch enables support for TM SPR state related ELF core
note NT_PPC_TM_SPR based ptrace requests through PTRACE_GETREGSET,
PTRACE_SETREGSET calls. This is achieved through adding a register
set REGSET_TM_SPR in powerpc corresponding to the ELF core note
section added.
From: Anshuman Khandual
This patch enables support for TM checkpointed VSX register
set ELF core note NT_PPC_CVSX based ptrace requests through
PTRACE_GETREGSET, PTRACE_SETREGSET calls. This is achieved
through adding a register set REGSET_CVSX in powerpc
corresponding to the ELF core note sectio
From: Anshuman Khandual
This patch enables support for TM checkpointed VMX register
set ELF core note NT_PPC_CVMX based ptrace requests through
PTRACE_GETREGSET, PTRACE_SETREGSET calls. This is achieved
through adding a register set REGSET_CVMX in powerpc
corresponding to the ELF core note sectio
From: Anshuman Khandual
This patch enables support for TM checkpointed FPR register
set ELF core note NT_PPC_CFPR based ptrace requests through
PTRACE_GETREGSET, PTRACE_SETREGSET calls. This is achieved
through adding a register set REGSET_CFPR in powerpc
corresponding to the ELF core note sectio
From: Anshuman Khandual
This patch enables support for TM checkpointed GPR register
set ELF core note NT_PPC_CGPR based ptrace requests through
PTRACE_GETREGSET, PTRACE_SETREGSET calls. This is achieved
through adding a register set REGSET_CGPR in powerpc
corresponding to the ELF core note sectio
From: Anshuman Khandual
This patch splits gpr32_get, gpr32_set functions to accommodate
in transaction ptrace requests implemented in patches later in
the series.
Signed-off-by: Anshuman Khandual
Signed-off-by: Simon Guo
---
arch/powerpc/kernel/ptrace.c | 64 ++
From: Anshuman Khandual
This patch enables in transaction NT_PPC_VSX ptrace requests. The
function vsr_get which gets the running value of all VSX registers
and the function vsr_set which sets the running value of of all VSX
registers work on the running set of VMX registers whose location
will b
From: Anshuman Khandual
This patch enables in transaction NT_PPC_VMX ptrace requests. The
function vr_get which gets the running value of all VMX registers
and the function vr_set which sets the running value of of all VMX
registers work on the running set of VMX registers whose location
will be
From: Anshuman Khandual
This patch enables in transaction NT_PRFPREG ptrace requests.
The function fpr_get which gets the running value of all FPR
registers and the function fpr_set which sets the running
value of of all FPR registers work on the running set of FPR
registers whose location will b
From: Anshuman Khandual
This patch creates a function flush_tmregs_to_thread which
will then be used by subsequent patches in this series. The
function checks for self tracing ptrace interface attempts
while in the TM context and logs appropriate warning message.
Signed-off-by: Anshuman Khandual
From: Anshuman Khandual
This patch adds twelve ELF core note sections for powerpc
architecture for various registers and register sets which
need to be accessed from ptrace interface and then gdb.
These additions include special purpose registers like TAR,
PPR, DSCR, TM running and checkpointed s
From: Simon Guo
This patch series adds thirteen new ELF core note sections which can
be used with existing ptrace request PTRACE_GETREG/SET-SETREGSET for
accessing various transactional memory and other miscellaneous debug
register sets on powerpc platform.
Signed-off-by: Anshuman Khandual
Gavin Shan writes:
> On Wed, Jul 27, 2016 at 04:14:04PM +1000, Russell Currey wrote:
>>diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c
>>b/arch/powerpc/platforms/powernv/pci-ioda.c
>>index 891fc4a..2b9f114 100644
>>--- a/arch/powerpc/platforms/powernv/pci-ioda.c
>>+++ b/arch/powerpc/platf
Stephen Rothwell writes:
> Hi Michal,
>
> After merging the kbuild tree, today's linux-next build (powerpc
> ppc64_defconfig) failed like this:
>
...
> arch/powerpc/mm/hash_utils_64.c:929:10: note: in expansion of macro
> 'IS_ENABLED'
> else if IS_ENABLED(CONFIG_PPC_NATIVE)
> ^
> cc1
Currently the power management bits are broken w.r.t. relocation.
There are direct branches from system_reset_pSeries to
power7_wakeup_*. The correct way to do it is to do what
the slb miss handler does, which is jump to a small stub within
the first 64k of relocated address and then jump to the ac
Hi Michal,
After merging the kbuild tree, today's linux-next build (powerpc
ppc64_defconfig) failed like this:
In file included from :0:0:
arch/powerpc/mm/hash_utils_64.c: In function 'hash__early_init_mmu':
include/linux/kconfig.h:19:65: error: expected '(' before numeric constant
#define o
On Wed, Jul 27, 2016 at 04:14:04PM +1000, Russell Currey wrote:
>On EEH events the kernel will print a dump of relevant registers.
>If EEH is unavailable (i.e. CONFIG_EEH is disabled, a new platform
>doesn't have EEH support, etc) this information isn't readily available.
>
>Add a new debugfs handl
On 14/07/16 07:17, Ian Munsie wrote:
mutex_lock(&afu->contexts_lock);
idr_preload(GFP_KERNEL);
- i = idr_alloc(&ctx->afu->contexts_idr, ctx, 0,
+ i = idr_alloc(&ctx->afu->contexts_idr, ctx,
+ ctx->afu->adapter->native->sl_ops->min_pe,
As it turns
On Thu, 2016-07-28 at 00:18 +1000, Michael Ellerman wrote:
> --- a/arch/powerpc/mm/hash_utils_64.c
> +++ b/arch/powerpc/mm/hash_utils_64.c
> @@ -530,7 +530,7 @@ static bool might_have_hea(void)
> * we will never see an HEA ethernet device.
> */
> #ifdef CONFIG_IBMEBUS
> - r
On Thu, 2016-07-28 at 00:18 +1000, Michael Ellerman wrote:
>
> diff --git a/arch/powerpc/include/asm/book3s/64/mmu.h
> b/arch/powerpc/include/asm/book3s/64/mmu.h
> index 70c995870297..6deda6ecc4f7 100644
> --- a/arch/powerpc/include/asm/book3s/64/mmu.h
> +++ b/arch/powerpc/include/asm/book3s/64/mm
I am also agree with Arnd Bergmann. We should use 'static inline function'
instead of macro to deal with error check.
On Tuesday 26 July 2016 05:09 PM, Arnd Bergmann wrote:
On Saturday, July 23, 2016 11:35:51 PM CEST Arvind Yadav wrote:
diff --git a/include/linux/err.h b/include/linux/err.h
ind
Commit 817820b0226a ("powerpc/iommu: Support "hybrid" iommu/direct DMA
ops for coherent_mask < dma_mask) adds a check of coherent_dma_mask
for dma allocations.
Unfortunately current PASemi code does not set this value for the DMA
engine, which ends up with the default value of 0
On Mon, 2016-11-07 at 03:38:57 UTC, Sam Mendoza-Jonas wrote:
> Commit 2def86a7200c
> ("hvc: Convert to using interrupts instead of opal events")
> enabled the use of interrupts in the hvc_driver for OPAL platforms.
> However on machines with more than one hvc console, any console after
> the first
[CC linux-mm]
On Wed 27-07-16 16:45:35, Abdul Haleem wrote:
> Hi,
>
> Kernel OOPS messages were seen while compiling linux test project (LTP)
> source on 4.7.0-rc5 mainline.
>
> Kernel config : pseries_le_defconfig
> Machine Type : PowerVM LPAR
> Machine hardware : LPAR uses 16 vCPUs, and 29G
On Wed, 2016-29-06 at 11:41:51 UTC, Michael Ellerman wrote:
> From: Cyril Bur
>
> Perform an exec() class syscall with a suspended transaction.
>
> Signed-off-by: Cyril Bur
> [mpe: Fix build errors, use a single binary for the test]
> Signed-off-by: Michael Ellerman
Applied to powerpc next.
On Thu, 2016-19-05 at 18:41:34 UTC, Unknown sender due to SPF wrote:
> The comment explaining why we modify VRSAVE is misleading, glibc
> does rely on the behaviour. Update the comment.
>
> Signed-off-by: Anton Blanchard
> Reviewed-by: Cyril Bur
Applied to powerpc next, thanks.
https://git.ker
On Mon, 2016-25-07 at 02:57:51 UTC, Michael Ellerman wrote:
> We removed the BEAT support in 2015 in commit bf4981a00636 ("powerpc:
> Remove the celleb support"). These externs are unused since then.
>
> Signed-off-by: Michael Ellerman
Applied to powerpc next.
https://git.kernel.org/powerpc/c/1
On Mon, 2016-11-07 at 03:38:58 UTC, Sam Mendoza-Jonas wrote:
> Update the hvc driver to use the OPAL irqchip if made available by the
> running firmware. If it is not present, the driver falls back to the
> existing OPAL event number.
>
> Signed-off-by: Samuel Mendoza-Jonas
> Acked-by: Michael El
On Tue, 2016-26-07 at 03:38:37 UTC, Michael Ellerman wrote:
> The recent commit to rework the hash MMU setup broke the build when
> CONFIG_PPC_NATIVE=n. Fix it by adding an IS_ENABLED() check before
> calling hpte_init_native().
>
> Removing the else clause opens the possibility that we don't set
prom_init.c: Enable support for new DRC device tree properties
"ibm,drc-info" and "ibm,dynamic-memory-v2" in initial handshake
between the Linux kernel and the front end processor.
Signed-off-by: Michael Bringmann
---
diff -Naur linux-rhel/arch/powerpc/kernel/prom_init.c
linux-rhel-patch/arch/po
architecture.vec5 features: The boot-time memory management needs to
know the form of the "ibm,dynamic-memory-v2" property early during
scanning of the flattened device tree. This patch moves execution of
the function pseries_probe_fw_features() early enough to be before
the scanning of the memory
rpadlpar_core.c: Provide parallel routines to search the older device-
tree properties ("ibm,drc-indexes", "ibm,drc-names", "ibm,drc-types"
and "ibm,drc-power-domains"), or the new property "ibm,drc-info". The
code searches for PHP PCI Slots, gets the DRC properties within the
current node (using
pseries/drc-info: Provide parallel routines to convert between
drc_index and CPU numbers at runtime, using the older device-tree
properties ("ibm,drc-indexes", "ibm,drc-names", "ibm,drc-types"
and "ibm,drc-power-domains"), or the new property "ibm,drc-info".
Signed-off-by: Michael Bringmann
---
d
hotplug_init: Simplify the code needed for runtime memory hotplug and
maintenance with a conversion routine that transforms the compressed
property "ibm,dynamic-memory-v2" to the form of "ibm,dynamic-memory"
within the "ibm,dynamic-reconfiguration-memory" property. Thus only
a single set of routin
powerpc/memory: Add parallel routines to parse the new property
"ibm,dynamic-memory-v2" property when it is present, and then to
finish initialization of the relevant memory structures with the
operating system. This code is shared between the boot-time
initialization functions and the runtime fun
Firmware Features: Define new bit flags representing the presence of
new device tree properties "ibm,drc-info", and "ibm,dynamic-memory-v2".
These flags are used to tell the front end processor when the Linux
kernel supports the new properties, and by the front end processor to
tell the Linux kerne
powerpc/memory: Add parallel routines to parse the new property
"ibm,dynamic-memory-v2" property when it is present, and then to
register the relevant memory blocks with the operating system.
This property format is intended to provide a more compact
representation of memory when communicating with
Several properties in the DRC device tree format are replaced by
more compact representations to allow, for example, for the encoding
of vast amounts of memory, and or reduced duplication of information
in related data structures.
"ibm,drc-info": This property, when present, replaces the following
Add a comment to the generated assembler for jump labels. This makes it
easier to identify them in asm listings (generated with $ make foo.s).
Signed-off-by: Michael Ellerman
---
arch/powerpc/include/asm/jump_label.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
v3: New.
diff --git
From: "Aneesh Kumar K.V"
This allows us to catch incorrect usage of cpu_has_feature() and
mmu_has_feature() prior to jump labels being initialised.
Signed-off-by: Aneesh Kumar K.V
Signed-off-by: Michael Ellerman
---
arch/powerpc/Kconfig.debug | 10 ++
arch/powerpc/incl
From: Kevin Hao
As we just did for CPU features.
Signed-off-by: Kevin Hao
Signed-off-by: Aneesh Kumar K.V
Signed-off-by: Michael Ellerman
---
arch/powerpc/include/asm/mmu.h| 36
arch/powerpc/kernel/cputable.c| 17 +
arch/powerpc/li
From: Kevin Hao
We do binary patching of asm code using CPU features, which is a
one-time operation, done during early boot. However checks of CPU
features in C code are currently done at run time, even though the set
of CPU features can never change after boot.
We can optimise this by using jum
Add a kconfig option to control whether we use jump label for the
cpu/mmu_has_feature() checks. Currently this does nothing, but we will
enabled it in the subsequent patches.
Signed-off-by: Michael Ellerman
---
arch/powerpc/Kconfig.debug | 9 +
1 file changed, 9 insertions(+)
v3: New.
From: Kevin Hao
We plan to use jump label for cpu_has_feature(). In order to implement
this we need to include the linux/jump_label.h in asm/cputable.h.
Unfortunately if we do that it leads to an include loop. The root of the
problem seems to be that reg.h needs cputable.h (for CPU_FTRs), and th
From: Kevin Hao
This function is only used by get_vtb(). They are almost the same except
the reading from the real register. Move the mfspr() to get_vtb() and
kill the function mfvtb(). With this, we can eliminate the use of
cpu_has_feature() in very core header file like reg.h. This is a
prepara
From: "Aneesh Kumar K.V"
Call jump_label_init() early so that we can use static keys for CPU and
MMU feature checks.
Signed-off-by: Aneesh Kumar K.V
Signed-off-by: Michael Ellerman
---
arch/powerpc/lib/feature-fixups.c | 8
1 file changed, 8 insertions(+)
v3: Updated comment.
diff
From: Kevin Hao
Some arches (powerpc at least) would like to invoke jump_label_init()
much earlier in boot. So check static_key_initialized in order to make
sure this function runs only once.
Signed-off-by: Kevin Hao
Signed-off-by: Aneesh Kumar K.V
Signed-off-by: Michael Ellerman
---
kernel/
From: "Aneesh Kumar K.V"
This switches early feature checks to use the non static key variant of
the function. In later patches we will be switching cpu_has_feature()
and mmu_has_feature() to use static keys and we can use them only after
static key/jump label is initialized. Any check for featur
In later patches, we will be switching cpu and mmu feature checks to
use static keys. For checks in early boot before jump label is
initialized we need a variant of cpu/mmu_has_feature() that doesn't use
jump labels. So create those called, unimaginatively,
__cpu/__mmu_has_feature().
Signed-off-by
Like we just did for hash, split the device tree scanning parts out and
call them from mmu_early_init_devtree().
Signed-off-by: Michael Ellerman
---
arch/powerpc/include/asm/book3s/64/mmu.h | 1 +
arch/powerpc/mm/init_64.c| 4 +++-
arch/powerpc/mm/pgtable-radix.c | 3 +--
Currently we have radix_enabled() three times, twice in asm/book3s/64/mmu.h
and then a fallback in asm/mmu.h.
Consolidate them in asm/mmu.h. While we're at it convert them to be
static inlines, and change the fallback case to returning a bool, like
mmu_has_feature().
Signed-off-by: Michael Ellerm
The intention is that the result is only used as a boolean, so enforce
that by changing the return type to bool.
Signed-off-by: Michael Ellerman
---
arch/powerpc/include/asm/cputable.h | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
v3: Split out.
diff --git a/arch/powerpc/inclu
The intention is that the result is only used as a boolean, so enforce
that by changing the return type to bool.
Signed-off-by: Michael Ellerman
---
arch/powerpc/include/asm/mmu.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
v3: Split out.
diff --git a/arch/powerpc/include/asm/mmu
From: "Aneesh Kumar K.V"
MMU feature bits are defined such that we use the lower half to
present MMU family features. Remove the strict split of half and
also move Radix to a mmu family feature. Radix introduce a new MMU
model and strictly speaking it is a new MMU family. This also free
up bits w
Early in boot we binary patch some sections of code based on the CPU and
MMU feature bits. But it is a one-time patching, there is no facility
for repatching the code later if the set of features change.
It is a major bug if the set of features changes after we've done the
code patching - so add a
Up until now we needed to do the MMU init before feature patching,
because part of the MMU init was scanning the device tree and setting
and/or clearing some MMU feature bits.
Now that we have split that MMU feature modification out into routines
called from early_init_devtree() (called earlier) w
Currently MMU initialisation (early_init_mmu()) consists of a mixture of
scanning the device tree, setting MMU feature bits, and then also doing
actual initialisation of MMU data structures.
We'd like to decouple the setting of the MMU features from the actual
setup. So split out the device tree s
Move the handling of the disable_radix command line argument into the
newly created mmu_early_init_devtree().
It's an MMU option so it's preferable to have it in an mm related file,
and it also means platforms that don't support radix don't have to carry
the code.
Signed-off-by: Michael Ellerman
Empty for now, but we'll add to it in the next patch.
Signed-off-by: Michael Ellerman
---
arch/powerpc/include/asm/book3s/64/mmu.h | 1 +
arch/powerpc/include/asm/mmu.h | 1 +
arch/powerpc/kernel/prom.c | 2 ++
arch/powerpc/mm/init_64.c| 6 ++
4 files
On Wed, Jul 27, 2016 at 09:50:03PM +1000, Nicholas Piggin wrote:
> On Wed, 27 Jul 2016 17:32:06 +1000
> Balbir Singh wrote:
>
> > +#ifndef CONFIG_RELOCATABLE
> > + b power7_wakeup_common
> > +#else
> > + /*
> > +* We can't just use a direct branch to power7_wakeup_common
> > +*
Hi,
Kernel OOPS messages were seen while compiling linux test project (LTP) source
on4.7.0-rc5 mainline.
kernel config : pseries_le_defconfig
machine Type : PowerVM LPAR
trace messages:
*15:34:57* [ 862.548866] Unable to handle kernel paging request for data at
address 0x
*15:34:57*
On Wed, Jul 27, 2016 at 04:45:35PM +0530, Abdul Haleem wrote:
> Hi,
>
> Kernel OOPS messages were seen while compiling linux test project (LTP)
> source on 4.7.0-rc5 mainline.
>
> Kernel config : pseries_le_defconfig
> Machine Type : PowerVM LPAR
> Machine hardware : LPAR uses 16 vCPUs, and 29G
On Wed, 27 Jul 2016 20:01:24 +1000
Balbir Singh wrote:
> On Wed, Jul 27, 2016 at 7:53 PM, Benjamin Herrenschmidt
> wrote:
> > On Wed, 2016-07-27 at 17:32 +1000, Balbir Singh wrote:
> >> From: Balbir Singh
> >>
> >> Currently the power management bits are broken w.r.t. relocation.
> >> There a
On Wed, 27 Jul 2016 17:32:06 +1000
Balbir Singh wrote:
> From: Balbir Singh
>
> Currently the power management bits are broken w.r.t. relocation.
> There are direct branches from system_reset_pSeries to
> power7_wakeup_*. The correct way to do it is to do what
> the slb miss handler does, which
On Wed, Jul 27, 2016 at 05:32:06PM +1000, Balbir Singh wrote:
>
> From: Balbir Singh
>
> Currently the power management bits are broken w.r.t. relocation.
> There are direct branches from system_reset_pSeries to
> power7_wakeup_*. The correct way to do it is to do what
> the slb miss handler doe
Hi Simon,
wei.guo.si...@gmail.com writes:
> From: Anshuman Khandual
>
> This patch creates a function flush_tmregs_to_thread which
> will then be used by subsequent patches in this series. The
> function checks for self tracing ptrace interface attempts
> while in the TM context and logs appropr
Hi,
Kernel OOPS messages were seen while compiling linux test project (LTP) source
on 4.7.0-rc5 mainline.
Kernel config : pseries_le_defconfig
Machine Type : PowerVM LPAR
Machine hardware : LPAR uses 16 vCPUs, and 29G memory
trace messages:
*15:34:57* [ 862.548866] Unable to handle kernel pa
On Tue, 2016-07-26 at 19:52 +0200, LEROY Christophe wrote:
> In ppc8xx tlbmiss handler, we consider a page valid if both
> _PAGE_PRESENT and _PAGE_ACCESSED are set.
> Is there any chance to have _PAGE_ACCESSED set and not _PAGE_PRESENT ?
> Otherwise we could simplify the handler by considering th
Hi,
[auto build test ERROR on v4.7-rc7]
[cannot apply to powerpc/next next-20160727]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Balbir-Singh/Make-system_reset_pSeries-relocatable/20160727
On Wed, Jul 27, 2016 at 7:53 PM, Benjamin Herrenschmidt
wrote:
> On Wed, 2016-07-27 at 17:32 +1000, Balbir Singh wrote:
>> From: Balbir Singh
>>
>> Currently the power management bits are broken w.r.t. relocation.
>> There are direct branches from system_reset_pSeries to
>> power7_wakeup_*.
>
> S
On Wed, 2016-07-27 at 17:32 +1000, Balbir Singh wrote:
> From: Balbir Singh
>
> Currently the power management bits are broken w.r.t. relocation.
> There are direct branches from system_reset_pSeries to
> power7_wakeup_*.
Side track: we should really get rid of the _pSeries suffix for these
thin
From: Anshuman Khandual
Fixes the following build failure -
cp_abort.c:90:3: error: ‘for’ loop initial declarations are only
allowed in C99 or C11 mode
for (int i = 0; i < NUM_LOOPS; i++) {
^
cp_abort.c:90:3: note: use option -std=c99, -std=gnu99, -std=c11 or
-std=gnu11 to compile your cod
From: Anshuman Khandual
This patch adds a .gitignore file for all the executables in
the ptrace test directory thus making invisible with git status
query.
Cc: Benjamin Herrenschmidt
Cc: Paul Mackerras
Cc: Michael Ellerman
Cc: Shuah Khan
Cc: Anton Blanchard
Cc: Cyril Bur
Cc: Anshuman Khand
From: Anshuman Khandual
This patch adds ptrace interface test for TM SPR registers. This
also adds ptrace interface based helper functions related to TM
SPR registers access.
Cc: Benjamin Herrenschmidt
Cc: Paul Mackerras
Cc: Michael Ellerman
Cc: Shuah Khan
Cc: Anton Blanchard
Cc: Cyril Bur
From: Anshuman Khandual
This patch adds ptrace interface test for VSX, VMX registers
inside suspended TM context.
Cc: Benjamin Herrenschmidt
Cc: Paul Mackerras
Cc: Michael Ellerman
Cc: Shuah Khan
Cc: Anton Blanchard
Cc: Cyril Bur
Cc: Anshuman Khandual
Cc: Simon Guo
Cc: Ulrich Weigand
Cc
From: Anshuman Khandual
This patch adds ptrace interface test for VSX, VMX registers
inside TM context. This also adds ptrace interface based helper
functions related to chckpointed VSX, VMX registers access.
Cc: Benjamin Herrenschmidt
Cc: Paul Mackerras
Cc: Michael Ellerman
Cc: Shuah Khan
C
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