[PATCH RESEND v8] powerpc32: provide VIRT_CPU_ACCOUNTING

This patch provides VIRT_CPU_ACCOUTING to PPC32 architecture. PPC32 doesn't have the PACA structure, so we use the task_info structure to store the accounting data. In order to reuse on PPC32 the PPC64 functions, all u64 data has been replaced by 'unsigned long' so that it is u32 on PPC32 and u64

[PATCH v6 5/7] T104xD4RDB: Add qe node to t104xd4rdb

add qe node to t104xd4rdb.dtsi and t1040si-post.dtsi. Signed-off-by: Zhao Qiang --- Changes for v2 - rebase Changes for v3 - rebase Changes for v4 - rebase Changes for v5 - rebase Changes for v6 - NA arch/powerpc/boot/dts/fsl/t1040si-post.dtsi | 45 ++

[PATCH v6 7/7] T104xQDS: Add qe node to t104xqds

add qe node to t104xqds.dtsi Signed-off-by: Zhao Qiang --- Changes for v2 - rebase Changes for v3 - rebase Changes for v4 - rebase Changes for v5 - rebase Changes for v6 - NA arch/powerpc/boot/dts/fsl/t104xqds.dtsi | 38 +

[PATCH v6 2/7] QE: Add ucc hdlc document to bindings

Add ucc hdlc document to Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt Signed-off-by: Zhao Qiang Acked-by: Rob Herring --- hanges for v2 - use ucc-hdlc instead of ucc_hdlc - add more information to properties. Changes for v3 - use fsl,tx-timeslot-mask i

[PATCH v6 1/7] QE: Add IC, SI and SIRAM document to device tree bindings.

Add IC, SI and SIRAM document of QE to Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt Signed-off-by: Zhao Qiang Acked-by: Rob Herring --- changes for v2 - Add interrupt-controller in Required properties - delete address-cells and size-cells for qe-si and qe-siram Cha

[PATCH v6 3/7] QE: Add uqe_serial document to bindings

Add uqe_serial document to Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt Signed-off-by: Zhao Qiang --- Changes for v2 - modify tx/rx-clock-name specification Changes for v3 - NA Changes for v4 - drop device_type - modify to SoC specific compa

[PATCH v6 6/7] T104xRDB: Add qe node to t104xrdb

add qe node to t104xrdb.dtsi Signed-off-by: Zhao Qiang --- Changes for v2 - rebase Changes for v3 - rebase Changes for v4 - rebase Changes for v5 - rebase Changes for v6 - NA arch/powerpc/boot/dts/fsl/t104xrdb.dtsi | 38 +

[PATCH v6 4/7] bindings: move cpm_qe binding from powerpc/fsl to soc/fsl

cpm_qe is supported on both powerpc and arm. and the QE code has been moved from arch/powerpc into drivers/soc/fsl, so move cpm_qe binding from powerpc/fsl to soc/fsl Signed-off-by: Zhao Qiang Acked-by: Rob Herring --- Changes for v3 - NA Changes for v4 - NA Changes for v5

Re: [v5,1/7] QE: Add IC, SI and SIRAM document to device tree bindings.

On Tue, 2016-05-17 at 01:18 +, Qiang Zhao wrote: > On Tue, May 17, 2016 at 07:22AM, Scott Wood wrote: > > -Original Message- > > From: Scott Wood [mailto:o...@buserror.net] > > Sent: Tuesday, May 17, 2016 7:22 AM > > To: Qiang Zhao > > Cc: robh...@kernel.org; devicet...@vger.kernel.org

Pull request: scottwood/linux.git next

Sorry for the lateness... Contains include 86xx fixes, minor device tree fixes, an erratum workaround, and a kconfig dependency fix. The following changes since commit 1d4e89cf0a4e819fbde428e9e5286e7141a02e06: powerpc/powernv/npu: Add PE to PHB's list (2016-05-12 19:56:25 +1000) are available

RE: [v5,1/7] QE: Add IC, SI and SIRAM document to device tree bindings.

On Tue, May 17, 2016 at 07:22AM, Scott Wood wrote: > -Original Message- > From: Scott Wood [mailto:o...@buserror.net] > Sent: Tuesday, May 17, 2016 7:22 AM > To: Qiang Zhao > Cc: robh...@kernel.org; devicet...@vger.kernel.org; linux- > ker...@vger.kernel.org; Xiaobo Xie ; Yang-Leo Li > ; l

Re: [v4,1/1] powerpc/86xx: Add support for Emerson/Artesyn MVME7100

On Wed, Apr 27, 2016 at 10:35:25AM +0200, Alessio Igor Bogani wrote: > + bcsr@4,0 { > + compatible = "artesyn,mvme7100-bcsr"; > + reg = <4 0 0x1>; > + }; > + > +serial@5,1000 { > + cell-index = <2>;

Re: [v5,1/7] QE: Add IC, SI and SIRAM document to device tree bindings.

On Wed, Mar 09, 2016 at 09:21:28AM +0800, Zhao Qiang wrote: > Add IC, SI and SIRAM document of QE to > Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt > > Signed-off-by: Zhao Qiang > Acked-by: Rob Herring > --- > changes for v2 > - Add interrupt-controller in Required propertie

Re: [PATCH v2 1/7] powerpc/8xx: Fix vaddr for IMMR early remap

On Fri, 2016-05-13 at 11:25 +0200, Christophe Leroy wrote: > Le 11/05/2016 à 22:38, Scott Wood a écrit : > > On Wed, 2016-05-11 at 17:03 +0200, Christophe Leroy wrote: > > > Memory: 124428K/131072K available (3748K kernel code, 188K rwdata, > > > 648K rodata, 508K init, 290K bss, 6644K reserved) >

Re: klp_task_patch: was: [RFC PATCH v2 17/18] livepatch: change to a per-task consistency model

On Mon, May 09, 2016 at 02:23:03PM +0200, Petr Mladek wrote: > On Fri 2016-05-06 07:38:55, Josh Poimboeuf wrote: > > On Thu, May 05, 2016 at 01:57:01PM +0200, Petr Mladek wrote: > > > I have missed that the two commands are called with preemption > > > disabled. So, I had the following crazy scenar

Re: [RFC PATCH v2 17/18] livepatch: change to a per-task consistency model

On Mon, May 09, 2016 at 11:41:37AM +0200, Miroslav Benes wrote: > > +void klp_init_transition(struct klp_patch *patch, int state) > > +{ > > + struct task_struct *g, *task; > > + unsigned int cpu; > > + struct klp_object *obj; > > + struct klp_func *func; > > + int initial_state = !state;

Re: [PATCH] gpio: dt-bindings: add ibm,ppc4xx-gpio binding

On Mon, May 16, 2016 at 10:27:46AM -0500, Rob Herring wrote: > On Thu, May 12, 2016 at 12:07:48AM +0200, Christian Lamparter wrote: > > This patch adds binding information for IBM/AMCC/APM GPIO > > Controllers of the PowerPC 4XX series and compatible SoCs. > > > > The "PowerPC 405EP Embedded Proce

Re: ppc64 sbrk returns executable heap in 32-bit emulation mode

On 05/16/2016 11:09 AM, Andreas Schwab wrote: Florian Weimer writes: But my test says that at least part of .bss in the main executable is *not* executable. Build with -mbss-plt -Wl,--bss-plt. This gives me: FAIL exec .bss data (unexpected result) FAIL exec .data (unexpected result)

Re: [PATCH] gpio: dt-bindings: add ibm,ppc4xx-gpio binding

On Thu, May 12, 2016 at 12:07:48AM +0200, Christian Lamparter wrote: > This patch adds binding information for IBM/AMCC/APM GPIO > Controllers of the PowerPC 4XX series and compatible SoCs. > > The "PowerPC 405EP Embedded Processor Data Sheet" has the > following to say about the GPIO controllers:

Re: [PATCH] drivers/of: Fix build warning in populate_node()

On Fri, May 13, 2016 at 09:31:39PM +1000, Gavin Shan wrote: > Function populate_node() is used to unflatten FDT blob to device > tree. It supports maximal 64 level of device nodes. There is one > array @fpsizes[64] tracking the full name length of last unflattened > device node in the corresponding

Re: powerpc/usb: machine check when writing to portsc in ehci-fsl

Hi Guys, I have the same issue on Xerox machine based freescale P1022 board. It hangs on USB initialization and the machine is dead and not responding at all. Trying to enable or disable the USB but it ask for password to enter the prompt command. During the boot, boot/config/usb1.disable fil

Freescale PowerQUICC II dev board available

I have an older Freescale MPC8315E-RDB development board: http://www.nxp.com/files/32bit/doc/fact_sheet/MPC8315ERDBFS.pdf http://www.nxp.com/files/32bit/doc/data_sheet/MPC8315EEC.pdf It comes in a nice Mini-ITX enclosure with a half-height 3.3V PCI riser adapter, and a SATA hard disk. If anyone

Re: ppc64 sbrk returns executable heap in 32-bit emulation mode

Florian Weimer writes: > But my test says that at least part of .bss in the main executable is > *not* executable. Build with -mbss-plt -Wl,--bss-plt. Andreas. -- Andreas Schwab, sch...@linux-m68k.org GPG Key fingerprint = 58CA 54C7 6D53 942B 1756 01D3 44D5 214B 8276 4ED5 "And now for someth

Re: ppc64 sbrk returns executable heap in 32-bit emulation mode

Alan Modra writes: > On Thu, May 12, 2016 at 03:41:09PM +0200, Florian Weimer wrote: >> We noticed that on ppc64, the sbrk system call in the 32-bit subsystem >> returns executable memory. I assume it is related to this, in >> arch/powerpc/include/asm/page.h: >> >> /* >> * Unfortunately the

Re: ppc64 sbrk returns executable heap in 32-bit emulation mode

On 05/16/2016 10:49 AM, Andreas Schwab wrote: (If I'm wrong about heap+stack needing the same protection then I can't think of any reason to require an executable heap.) The heap and the BSS initially share the same page. But my test says that at least part of .bss in the main executable is

Re: ppc64 sbrk returns executable heap in 32-bit emulation mode

On 05/16/2016 08:24 AM, Alan Modra wrote: On Thu, May 12, 2016 at 03:41:09PM +0200, Florian Weimer wrote: We noticed that on ppc64, the sbrk system call in the 32-bit subsystem returns executable memory. I assume it is related to this, in arch/powerpc/include/asm/page.h: /* * Unfortunately t

[RFC PATCH 2/2] KVM: PPC: Don't take lock when check irq's resend flag

It seems that we don't need to take the lock before evaluating irq's resend flag. What needed is to make sure when we clear the ics's bit in the icp's resend_map, we don't miss the resend flag of the irqs that set the bit. And seems this could be ordered through the barrier in test_and_clear_bit()