On Wed, Feb 03, 2016 at 10:26:36AM -0200, Guilherme G. Piccoli wrote:
>On 02/02/2016 09:48 PM, Gavin Shan wrote:
>>On Tue, Jan 19, 2016 at 06:18:20PM -0200, Guilherme G. Piccoli wrote:
>>>-/* only attempt to use a new window if 64-bit DMA is requested */
>>>-if (!disable_ddw && dma_mask ==
On Wed, Feb 03, 2016 at 09:54:51AM -0200, Guilherme G. Piccoli wrote:
>On 02/02/2016 08:44 PM, Gavin Shan wrote:
>>>/**
>>>+ * eeh_available - Checks for the availability of EEH based on running
>>>+ * architecture.
>>>+ *
>>>+ * This routine should be used in case we need to check if EEH is
>>>+ *
On 03-02-16, 21:54, Shilpasri G Bhat wrote:
>
> >
> > And now that you have mentioned that to me, why shouldn't this stats
> > directory be moved to debugfs ? :)
> >
> > We are never going to perform a store here, isn't it ? And is just for
> > information, nothing more.
> >
>
> I would very m
The values returned by the show functions for the host os_type,
mad_version, and partition_number attributes get their values
directly from the madapter_info struct whose associated fields are
__be32 typed. Added endian conversion to ensure these values are
sane on LE platforms.
Signed-off-by: Tyr
A VIOSRP_HOST_CONFIG_TYPE management datagram (MAD) has existed in
the code for some time. From what information I've gathered from
Brian King this was likely implemented on the host side in a SLES 9
based VIOS, which is no longer supported anywhere. Further, it is
not defined in PAPR or supported
The root node of the OF device tree is exported as of_root. No need
to look up the root by path name. Instead just get a reference
directly via of_root.
Signed-off-by: Tyrel Datwyler
---
drivers/scsi/ibmvscsi/ibmvscsi.c | 14 ++
1 file changed, 6 insertions(+), 8 deletions(-)
diff -
Add defines for mad version and mad os_type, and replace the magic
numbers in set_adapter_info() accordingly.
Signed-off-by: Tyrel Datwyler
---
drivers/scsi/ibmvscsi/ibmvscsi.c | 4 ++--
drivers/scsi/ibmvscsi/viosrp.h | 2 ++
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/drive
The PAPR defines four valid header values for the first byte of a
CRQ message. Namely, an unused/empty message (0x00), a valid
command/response entry (0x80), a valid initialization entry (0xC0),
and a transport event (0xFF). Define these values as enums and use
them in the code in place of their ma
The enum values for VIOSRP_LINUX_FORMAT and VIOSRP_INLINE_FORMAT are
off by one. They are currently defined as 0x06 and 0x07 respetively.
These values are defined in PAPR correctly as 0x05 and 0x06. This
inconsistency has gone unnoticed as neither enum is currently used.
The possible future support
Fixed up a couple spots that were out of line with the PAPR in regards
to its defined VSCSI protocol. Did away with some magic numbers directly
in the code. Fixed a minor endian issue.
Tyrel Datwyler (6):
ibmvscsi: Correct values for several viosrp_crq_format enums
ibmvscsi: Add and use enums
On 2/3/2016 6:59 PM, Alexander Graf wrote:
On 02/03/2016 11:54 PM, Julian Margetson wrote:
On 2/3/2016 6:20 PM, Alexander Graf wrote:
On 02/03/2016 11:15 PM, Julian Margetson wrote:
On 2/3/2016 4:43 PM, Alexander Graf wrote:
On 02/03/2016 10:33 AM, Julian Margetson wrote:
Resending as i
From: Scott Wood:
>On Mon, 2016-02-01 at 03:57 +, Zhiqiang Hou wrote:
>> Any comments?
>
> Only that it was submitted too late for the last merge window, and I have not
> yet begun processing patches for the next one. If you meant this to be a fix
> important enough to go in outside the merge
On Wed, 2016-02-03 at 21:32 +, Edward L Swarthout wrote:
> From: Scott Wood:
> > On Mon, 2016-02-01 at 03:57 +, Zhiqiang Hou wrote:
> > > Any comments?
> >
> > Only that it was submitted too late for the last merge window, and I have
> > not
> > yet begun processing patches for the next on
On 02/03/2016 11:54 PM, Julian Margetson wrote:
On 2/3/2016 6:20 PM, Alexander Graf wrote:
On 02/03/2016 11:15 PM, Julian Margetson wrote:
On 2/3/2016 4:43 PM, Alexander Graf wrote:
On 02/03/2016 10:33 AM, Julian Margetson wrote:
Resending as it was attached to and old thread relating to
Remove one instruction in mulhdu
Signed-off-by: Christophe Leroy
---
v2: new
v3: no change
v4: no change
v5: no change
arch/powerpc/kernel/misc_32.S | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S
inde
Inlining of _dcache_range() functions has shown that the compiler
does the same thing a bit better with one insn less
Signed-off-by: Christophe Leroy
---
v2: new
v3: no change
v4: no change
v5: no change
arch/powerpc/kernel/misc_32.S | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
d
This simplification helps the compiler. We now have only one test
instead of two, so it reduces the number of branches.
Signed-off-by: Christophe Leroy
---
v2: new
v3: no change
v4: no change
v5: no change
arch/powerpc/mm/dma-noncoherent.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
flush/clean/invalidate _dcache_range() functions are all very
similar and are quite short. They are mainly used in __dma_sync()
perf_event locate them in the top 3 consumming functions during
heavy ethernet activity
They are good candidate for inlining, as __dma_sync() does
almost nothing but call
clear_pages() is never used expect by clear_page, and PPC32 is the
only architecture (still) having this function. Neither PPC64 nor
any other architecture has it.
This patch removes clear_pages() and moves clear_page() function
inline (same as PPC64) as it only is a few isns
Signed-off-by: Chris
This patch adds inline functions to use dcbz, dcbi, dcbf, dcbst
from C functions
Signed-off-by: Christophe Leroy
---
v2: new
v3: no change
v4: no change
v5: no change
arch/powerpc/include/asm/cache.h | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/powerpc/include/a
On PPC8xx, flushing instruction cache is performed by writing
in register SPRN_IC_CST. This registers suffers CPU6 ERRATA.
The patch rewrites the fonction in C so that CPU6 ERRATA will
be handled transparently
Signed-off-by: Christophe Leroy
---
v2: no change
v3: no change
v4: no change
v5: no ch
There is no real need to have set_context() in assembly.
Now that we have mtspr() handling CPU6 ERRATA directly, we
can rewrite set_context() in C language for easier maintenance.
Signed-off-by: Christophe Leroy
---
v2: no change
v3: no change
v4: no change
v5: no change
arch/powerpc/kernel/hea
CPU6 ERRATA is now handled directly in mtspr(), so we can use the
standard set_dec() fonction in all cases.
Signed-off-by: Christophe Leroy
---
v2: no change
v3: no change
v4: no change
v5: no change
arch/powerpc/include/asm/time.h | 6 +-
arch/powerpc/kernel/head_8xx.S | 18 -
MPC8xx has an ERRATA on the use of mtspr() for some registers
This patch includes the ERRATA handling directly into mtspr() macro
so that mtspr() users don't need to bother about that errata
Signed-off-by: Christophe Leroy
---
v2: no change
v3: no change
v4: no change
v5: no change
arch/powerpc
On 2/3/2016 6:20 PM, Alexander Graf wrote:
On 02/03/2016 11:15 PM, Julian Margetson wrote:
On 2/3/2016 4:43 PM, Alexander Graf wrote:
On 02/03/2016 10:33 AM, Julian Margetson wrote:
Resending as it was attached to and old thread relating to a
different motherboard.
On 2/2/2016 9:54 AM, J
Add missing SPRN defines into reg_8xx.h
Some of them are defined in mmu-8xx.h, so we include mmu-8xx.h in
reg_8xx.h, for that we remove references to PAGE_SHIFT in mmu-8xx.h
to have it self sufficient, as includers of reg_8xx.h don't all
include asm/page.h
Signed-off-by: Christophe Leroy
---
v2:
ioremap_base is not initialised and is nowhere used so remove it
Signed-off-by: Christophe Leroy
---
v2: no change
v3: fix comment as well
v4: no change
v5: no change
arch/powerpc/include/asm/nohash/32/pgtable.h | 2 +-
arch/powerpc/mm/mmu_decl.h | 1 -
arch/powerpc/mm/pgtab
Commit 771168494719 ("[POWERPC] Remove unused machine call outs")
removed the call to setup_io_mappings(), so remove the associated
progress line message
Signed-off-by: Christophe Leroy
---
v2: no change
v3: no change
v4: no change
v5: no change
arch/powerpc/mm/init_32.c | 4
1 file change
On recent kernels, with some debug options like for instance
CONFIG_LOCKDEP, the BSS requires more than 8M memory, allthough
the kernel code fits in the first 8M.
Today, it is necessary to activate CONFIG_PIN_TLB to get more than 8M
at startup, allthough pinning TLB is not necessary for that.
This
Once the linear memory space has been mapped with 8Mb pages, as
seen in the related commit, we get 11 millions DTLB missed during
the reference 600s period. 77% of the misses are on user addresses
and 23% are on kernel addresses (1 fourth for linear address space
and 3 fourth for virtual address sp
IMMR is now mapped by page tables so it is not
anymore necessary to PIN TLBs
Signed-off-by: Christophe Leroy
---
v2: no change
v3: no change
v4: no change
v5: no change
arch/powerpc/Kconfig.debug | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfi
Memory: 124428K/131072K available (3748K kernel code, 188K rwdata,
648K rodata, 508K init, 290K bss, 6644K reserved)
Kernel virtual memory layout:
* 0xfffdf000..0xf000 : fixmap
* 0xfde0..0xfe00 : consistent mem
* 0xfddf6000..0xfde0 : early ioremap
* 0xc900..0xfddf6000
x_mapped_by_bats() and x_mapped_by_tlbcam() serve the same kind of
purpose, and are never defined at the same time.
So rename them x_block_mapped() and define them in the relevant
places
Signed-off-by: Christophe Leroy
---
v2: no change
v3: Functions are mutually exclusive so renamed iaw Scott co
The fixmap related functions try to map kernel pages that are
already mapped through Large TLBs. pte_offset_kernel() has to
return NULL for LTLBs, otherwise the caller will try to access
level 2 table which doesn't exist
Signed-off-by: Christophe Leroy
---
v3: new
v4: no change
v5: no change
ar
Now we have a 8xx specific .c file for that so put it in there
as other powerpc variants do
Signed-off-by: Christophe Leroy
---
v2: no change
v3: no change
v4: no change
v5: no change
arch/powerpc/mm/8xx_mmu.c | 17 +
arch/powerpc/mm/init_32.c | 19 ---
2 files c
On a live running system (VoIP gateway for Air Trafic Control), over
a 10 minutes period (with 277s idle), we get 87 millions DTLB misses
and approximatly 35 secondes are spent in DTLB handler.
This represents 5.8% of the overall time and even 10.8% of the
non-idle time.
Among those 87 millions DTL
Now the noltlbs kernel parameter is also applicable to PPC8xx
Signed-off-by: Christophe Leroy
---
v2: no change
v3: no change
v4: no change
v5: no change
Documentation/kernel-parameters.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/kernel-parameters.txt
We are spending between 40 and 160 cycles with a mean of 65 cycles in
the DTLB handling routine (measured with mftbl) so make it more
simple althought it adds one instruction.
With this modification, we get three registers available at all time,
which will help with following patch.
Signed-off-by:
The main purpose of this patchset is to dramatically reduce the time
spent in DTLB miss handler. This is achieved by:
1/ Mapping RAM with 8M pages
2/ Mapping IMMR with a fixed 512K page
On a live running system (VoIP gateway for Air Trafic Control), over
a 10 minutes period (with 277s idle), we ge
When CONFIG_DEBUG_PAGEALLOC is activated, the initial TLB mapping gets
flushed to track accesses to wrong areas. Therefore, kernel addresses
will also generate ITLB misses.
Signed-off-by: Christophe Leroy
---
arch/powerpc/kernel/head_8xx.S | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
d
On 02/03/2016 11:15 PM, Julian Margetson wrote:
On 2/3/2016 4:43 PM, Alexander Graf wrote:
On 02/03/2016 10:33 AM, Julian Margetson wrote:
Resending as it was attached to and old thread relating to a
different motherboard.
On 2/2/2016 9:54 AM, Julian Margetson wrote:
Commit 9178ba294b68
On 2/3/2016 4:43 PM, Alexander Graf wrote:
On 02/03/2016 10:33 AM, Julian Margetson wrote:
Resending as it was attached to and old thread relating to a
different motherboard.
On 2/2/2016 9:54 AM, Julian Margetson wrote:
Commit 9178ba294b6839eeff1a91bed95515d783f3ee6c prevents building of
Am 2016-02-03 um 16:50 schrieb Bartlomiej Zolnierkiewicz:
> IDE subsystem has been deprecated since 2009 and the majority
> (if not all) of Linux distributions have switched to use
> libata for ATA support exclusively. However there are still
> some users (mostly old or/and embedded non-x86 system
On 02/03/2016 10:33 AM, Julian Margetson wrote:
Resending as it was attached to and old thread relating to a different
motherboard.
On 2/2/2016 9:54 AM, Julian Margetson wrote:
Commit 9178ba294b6839eeff1a91bed95515d783f3ee6c prevents building of
kernel 4.1 branch on A-Eon Tabor Board.
CC
From: Hemant Kumar
'perf probe' through debuginfo__find_probes() in util/probe-finder.c
checks for the functions' frame descriptions in either .eh_frame section
of an ELF or the .debug_frame.
The check is based on whether either one of these sections is present.
Depending on distro, toolchain de
IDE subsystem has been deprecated since 2009 and the majority
(if not all) of Linux distributions have switched to use
libata for ATA support exclusively. However there are still
some users (mostly old or/and embedded non-x86 systems) that
have not converted from using IDE subsystem to libata PATA
>
> And now that you have mentioned that to me, why shouldn't this stats
> directory be moved to debugfs ? :)
>
> We are never going to perform a store here, isn't it ? And is just for
> information, nothing more.
>
I would very much like to keep the throttle stats either in cpuX/cpufreq or
gl
Hi Rafael,
On 02/03/2016 07:10 PM, Rafael J. Wysocki wrote:
> Hi,
>
> On Tue, Feb 2, 2016 at 8:41 PM, Shilpasri G Bhat
> wrote:
>> In POWER8, OCC(On-Chip-Controller) can throttle the frequency of the
>> CPU when the chip crosses its thermal and power limits. Currently,
>> powernv-cpufreq driver
IDE subsystem has been deprecated since 2009 and the majority
(if not all) of Linux distributions have switched to use
libata for ATA support exclusively. However there are still
some users (mostly old or/and embedded non-x86 systems) that
have not converted from using IDE subsystem to libata PATA
This patch disables deprecated IDE subsystem in pq2fads_defconfig
(no IDE host drivers are selected in this config so there is no valid
reason to enable IDE subsystem itself).
Signed-off-by: Bartlomiej Zolnierkiewicz
---
arch/powerpc/configs/pq2fads_defconfig | 1 -
1 file changed, 1 deletion(-)
IDE subsystem has been deprecated since 2009 and the majority
(if not all) of Linux distributions have switched to use
libata for ATA support exclusively. However there are still
some users (mostly old or/and embedded non-x86 systems) that
have not converted from using IDE subsystem to libata PATA
IDE subsystem has been deprecated since 2009 and the majority
(if not all) of Linux distributions have switched to use
libata for ATA support exclusively. However there are still
some users (mostly old or/and embedded non-x86 systems) that
have not converted from using IDE subsystem to libata PATA
IDE subsystem has been deprecated since 2009 and the majority
(if not all) of Linux distributions have switched to use
libata for ATA support exclusively. However there are still
some users (mostly old or/and embedded non-x86 systems) that
have not converted from using IDE subsystem to libata PATA
IDE subsystem has been deprecated since 2009 and the majority
(if not all) of Linux distributions have switched to use
libata for ATA support exclusively. However there are still
some users (mostly old or/and embedded non-x86 systems) that
have not converted from using IDE subsystem to libata PATA
This patch disables deprecated IDE subsystem in pasemi_defconfig
(no IDE host drivers are selected in this config so there is no valid
reason to enable IDE subsystem itself).
Cc: Olof Johansson
Signed-off-by: Bartlomiej Zolnierkiewicz
---
arch/powerpc/configs/pasemi_defconfig | 3 ---
1 file ch
IDE subsystem has been deprecated since 2009 and the majority
(if not all) of Linux distributions have switched to use
libata for ATA support exclusively. However there are still
some users (mostly old or/and embedded non-x86 systems) that
have not converted from using IDE subsystem to libata PATA
This patch disables deprecated IDE subsystem in mpc8610_hpcd_defconfig
(no IDE host drivers are selected in this config so there is no valid
reason to enable IDE subsystem itself).
Signed-off-by: Bartlomiej Zolnierkiewicz
---
arch/powerpc/configs/86xx/mpc8610_hpcd_defconfig | 1 -
1 file changed
IDE subsystem has been deprecated since 2009 and the majority
(if not all) of Linux distributions have switched to use
libata for ATA support exclusively. However there are still
some users (mostly old or/and embedded non-x86 systems) that
have not converted from using IDE subsystem to libata PATA
IDE subsystem has been deprecated since 2009 and the majority
(if not all) of Linux distributions have switched to use
libata for ATA support exclusively. However there are still
some users (mostly old or/and embedded non-x86 systems) that
have not converted from using IDE subsystem to libata PATA
IDE subsystem has been deprecated since 2009 and the majority
(if not all) of Linux distributions have switched to use
libata for ATA support exclusively. However there are still
some users (mostly old or/and embedded non-x86 systems) that
have not converted from using IDE subsystem to libata PATA
IDE subsystem has been deprecated since 2009 and the majority
(if not all) of Linux distributions have switched to use
libata for ATA support exclusively. However there are still
some users (mostly old or/and embedded non-x86 systems) that
have not converted from using IDE subsystem to libata PATA
IDE subsystem has been deprecated since 2009 and the majority
(if not all) of Linux distributions have switched to use
libata for ATA support exclusively. However there are still
some users (mostly old or/and embedded non-x86 systems) that
have not converted from using IDE subsystem to libata PATA
IDE subsystem has been deprecated since 2009 and the majority
(if not all) of Linux distributions have switched to use
libata for ATA support exclusively. However there are still
some users (mostly old or/and embedded non-x86 systems) that
have not converted from using IDE subsystem to libata PATA
IDE subsystem has been deprecated since 2009 and the majority
(if not all) of Linux distributions have switched to use
libata for ATA support exclusively. However there are still
some users (mostly old or/and embedded non-x86 systems) that
have not converted from using IDE subsystem to libata PATA
IDE subsystem has been deprecated since 2009 and the majority
(if not all) of Linux distributions have switched to use
libata for ATA support exclusively. However there are still
some users (mostly old or/and embedded non-x86 systems) that
have not converted from using IDE subsystem to libata PATA
IDE subsystem has been deprecated since 2009 and the majority
(if not all) of Linux distributions have switched to use
libata for ATA support exclusively. However there are still
some users (mostly old or/and embedded non-x86 systems) that
have not converted from using IDE subsystem to libata PATA
IDE subsystem has been deprecated since 2009 and the majority
(if not all) of Linux distributions have switched to use
libata for ATA support exclusively. However there are still
some users (mostly old or/and embedded non-x86 systems) that
have not converted from using IDE subsystem to libata PATA
This patch disables deprecated IDE subsystem in stx_gp3_defconfig
(no IDE host drivers are selected in this config so there is no valid
reason to enable IDE subsystem itself).
Cc: Scott Wood
Cc: Kumar Gala
Signed-off-by: Bartlomiej Zolnierkiewicz
---
arch/powerpc/configs/85xx/stx_gp3_defconfig
IDE subsystem has been deprecated since 2009 and the majority
(if not all) of Linux distributions have switched to use
libata for ATA support exclusively. However there are still
some users (mostly old or/and embedded non-x86 systems) that
have not converted from using IDE subsystem to libata PATA
This patch disables deprecated IDE subsystem in ksi8560_defconfig
(no IDE host drivers are selected in this config so there is no valid
reason to enable IDE subsystem itself).
Cc: Scott Wood
Cc: Kumar Gala
Signed-off-by: Bartlomiej Zolnierkiewicz
---
arch/powerpc/configs/85xx/ksi8560_defconfig
This patch disables deprecated IDE subsystem in mpc834x_itx_defconfig
(no IDE host drivers are selected in this config so there is no valid
reason to enable IDE subsystem itself).
Cc: Scott Wood
Cc: Kumar Gala
Signed-off-by: Bartlomiej Zolnierkiewicz
---
arch/powerpc/configs/83xx/mpc834x_itx_d
On 03-02-16, 17:32, Gautham R Shenoy wrote:
> Regarding the table-format, it breaks the sysfs's one-value-per-file
> rule. So I would still prefer each throttle reason being a separate
> file which gives the number of times the chip frequency was throttled
> due to that reason. We can live without
On 03-02-16, 14:40, Rafael J. Wysocki wrote:
> It looks like patches [1-5/6] are not objectionable and I can apply
> them without the last one if you want me to.
Looks fine to me.
--
viresh
___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
ht
Hi,
On Tue, Feb 2, 2016 at 8:41 PM, Shilpasri G Bhat
wrote:
> In POWER8, OCC(On-Chip-Controller) can throttle the frequency of the
> CPU when the chip crosses its thermal and power limits. Currently,
> powernv-cpufreq driver detects and reports this event as a console
> message. Some machines may
On 02/02/2016 09:48 PM, Gavin Shan wrote:
On Tue, Jan 19, 2016 at 06:18:20PM -0200, Guilherme G. Piccoli wrote:
- /* only attempt to use a new window if 64-bit DMA is requested */
- if (!disable_ddw && dma_mask == DMA_BIT_MASK(64)) {
+ /* We should check if EEH is enabled here,
Hi Viresh,
>
> What I can suggest is:
> - Move this directory inside cpuX/cpufreq/ directory, in a similar way
> as to how we create 'stats' directory today.
> - You can then get policy->cpu, to get chip->id out of it.
> - The only disadvantage here is that the same chip directory will be
> r
On 02/02/2016 08:44 PM, Gavin Shan wrote:
/**
+ * eeh_available - Checks for the availability of EEH based on running
+ * architecture.
+ *
+ * This routine should be used in case we need to check if EEH is
+ * available in some situation, regardless if EEH is enabled or not.
+ * For example, if
On Wed, Feb 03, 2016 at 09:55:11AM +0100, Jiri Kosina wrote:
> On Wed, 3 Feb 2016, AKASHI Takahiro wrote:
> > those efforts, we are proposing[1] a new *generic* gcc option,
> > -fprolog-add=N.
> > This option will insert N nop instructions at the beginning of each
> > function.
> The interesting
* Arnaldo Carvalho de Melo wrote:
> Hi Ingo,
>
> This is on top of the previously submitted perf-core-for-mingo tag,
> please consider applying,
>
> - Arnaldo
>
> The following changes since commit 5ac76283b32b116c58e362e99542182ddcfc8262:
>
> perf cpumap: Auto initialize cpu__max_{n
Resending as it was attached to and old thread relating to a different
motherboard.
On 2/2/2016 9:54 AM, Julian Margetson wrote:
Commit 9178ba294b6839eeff1a91bed95515d783f3ee6c prevents building of
kernel 4.1 branch on A-Eon Tabor Board.
CC arch/powerpc/math-emu/fsqrt.o
arch/powerpc/platfor
On 03-02-16, 14:12, Shilpasri G Bhat wrote:
> I need the chip-id in the _show(). With just sysfs_create_group() I will
> get the cpufreq_global_kobject in the _show() and I will not be able to
> figure out the chip-id.
The more I look at it, the more I am convinced that keeping this
'chip' directo
On Wed, 3 Feb 2016, AKASHI Takahiro wrote:
> > The gcc switch -mprofile-kernel, available for ppc64 on gcc > 4.8.5,
> > allows to call _mcount very early in the function, which low-level
> > ASM code and code patching functions need to consider.
> > Especially the link register and the parameter r
Hi,
On 02/03/2016 01:57 PM, Viresh Kumar wrote:
> On 03-02-16, 01:11, Shilpasri G Bhat wrote:
>> static int init_chip_info(void)
>> {
>> unsigned int chip[256];
>> -unsigned int cpu, i;
>> +unsigned int cpu;
>> unsigned int prev_chip_id = UINT_MAX;
>> cpumask_t cpu_mask;
>
On 03-02-16, 01:11, Shilpasri G Bhat wrote:
> static int init_chip_info(void)
> {
> unsigned int chip[256];
> - unsigned int cpu, i;
> + unsigned int cpu;
> unsigned int prev_chip_id = UINT_MAX;
> cpumask_t cpu_mask;
> - int ret = -ENOMEM;
> + int i, j, ret = -EN
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