On Mon, Jan 18, 2016 at 11:11 PM, David Daney wrote:
> On 01/18/2016 08:36 AM, Ganapatrao Kulkarni wrote:
>>
>> update numa_node of device associated with pci bus.
>> moved down devm_kzalloc to allocate from node memory.
>>
>> Signed-off-by: Ganapatrao Kulkarni
>> ---
>> drivers/pci/host/pci-ho
> -Original Message-
> From: Andrew Lunn [mailto:and...@lunn.ch]
> Sent: Monday, January 18, 2016 11:15 PM
> To: Shaohui Xie
> Cc: Sebastian Hesselbarth; Florian Fainelli; shh@gmail.com;
> devicet...@vger.kernel.org; net...@vger.kernel.org; linuxppc-
> d...@lists.ozlabs.org; da...@davem
On 01/13/2016 01:24 PM, Douglas Miller wrote:
On 01/12/2016 05:07 PM, Benjamin Herrenschmidt wrote:
On Tue, 2016-01-12 at 15:40 +1100, Alexey Kardashevskiy wrote:
Quite often drivers set only "write" permission assuming that this
includes "read" permission as well and this works on plenty
pla
On Fri, Jan 19, 2016 at 07:08 PM, Scott Wood wrote:
> -Original Message-
> From: Scott Wood [mailto:o...@buserror.net]
> Sent: Tuesday, January 19, 2016 7:08 AM
> To: Qiang Zhao ; Li Yang
> Cc: devicet...@vger.kernel.org; lkml ;
> linuxppc-dev ; priyanka.j...@freescale.com
> Subject: Re:
On Mon, 2016-01-18 at 23:22 +0100, Jiri Kosina wrote:
> On Tue, 5 Jan 2016, Torsten Duwe wrote:
>
> > > I (still) haven't had a chance to have a good look at it, but I won't
> > > this week
> > > anyway. So post v5 and hopefully I can review that and it will be perfect
> > > :)
> >
> > The perf
On Mon, 2016-01-18 at 09:24 +, Qiang Zhao wrote:
> On Fri, Jan 18, 2016 at 05:10 PM, Li Yang wrote:
> > -Original Message-
> > From: pku@gmail.com [mailto:pku@gmail.com] On Behalf Of Li Yang
> > Sent: Monday, January 18, 2016 5:10 PM
> > To: Qiang Zhao
> > Cc: devicet...@vger.k
On Tue, 5 Jan 2016, Torsten Duwe wrote:
> > I (still) haven't had a chance to have a good look at it, but I won't this
> > week
> > anyway. So post v5 and hopefully I can review that and it will be perfect :)
>
> The perfect v5 is there now, for 4 weeks minus the holiday season, and
> no furthe
On Mon, Jan 18, 2016 at 5:07 PM, Maciej S. Szmigiero
wrote:
> There is no guarantee that on fsl_ssi module load
> SSI registers will have their power-on-reset values.
>
> In fact, if the driver is reloaded the values in
> registers will be whatever they were set to previously.
>
> However, the cac
On Mon, Jan 18, 2016 at 10:59 AM, kbuild test robot wrote:
> Hi Caleb,
>
> [auto build test ERROR on asoc/for-next]
> [also build test ERROR on v4.4 next-20160118]
> [if your patch is applied to the wrong git tree, please drop us a note to
> help improving the system]
&g
Change watermark settings for imx processors. The previous setting
was fifo_depth-2, which causes silent but deadly xruns when using more
than 2 channels. This patch sets the watermark & maxburst
settings to
DMA, imx processors: 4
DMA, mpc8610 : fifo_depth - 2
FIQ, all : fifo_dep
v9: - Added cleanup patch to reuse and avoid redefinition of
cpumask_of_pcibus
as suggested from Will Deacon and Bjorn Helgaas.
- Including patch to Make pci-host-generic driver numa aware.
- Incorporated comment from Shannon Zhao.
v8:
- Incorporated review c
Adding numa dt binding support for arm64 based platforms.
dt node parsing for numa topology is done using device property
numa-node-id and device node distance-map.
Reviewed-by: Robert Richter
Signed-off-by: Ganapatrao Kulkarni
---
arch/arm64/Kconfig| 10 ++
arch/arm64/include/asm/
DT bindings for numa mapping of memory, cores and IOs.
Reviewed-by: Robert Richter
Signed-off-by: Ganapatrao Kulkarni
---
Documentation/devicetree/bindings/arm/numa.txt | 272 +
1 file changed, 272 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/n
Adding numa support for arm64 based platforms.
This patch adds by default the dummy numa node and
maps all memory and cpus to node 0.
using this patch, numa can be simulated on single node arm64 platforms.
Tested-by: Shannon Zhao
Reviewed-by: Robert Richter
Signed-off-by: Ganapatrao Kulkarni
--
Adding dt file for Cavium's Thunderx dual socket platform.
Signed-off-by: Ganapatrao Kulkarni
---
arch/arm64/boot/dts/cavium/Makefile | 2 +-
arch/arm64/boot/dts/cavium/thunder-88xx-2n.dts | 83 +++
arch/arm64/boot/dts/cavium/thunder-88xx-2n.dtsi | 806
3
At present cpumask_of_pcibus is defined for !CONFIG_NUMA and moving out
to common will allow to use for numa too. This also avoids
redefinition of this macro in respective architecture header files.
Signed-off-by: Ganapatrao Kulkarni
---
arch/arm64/include/asm/topology.h | 3 ---
arch/ia64/inc
update numa_node of device associated with pci bus.
moved down devm_kzalloc to allocate from node memory.
Signed-off-by: Ganapatrao Kulkarni
---
drivers/pci/host/pci-host-generic.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/pci/host/pci-host-generic.c
b
Hi Fabio,
On 18.01.2016 13:51, Fabio Estevam wrote:
> Hi Maciej,
>
> On Sun, Jan 17, 2016 at 8:02 PM, Maciej S. Szmigiero
> wrote:
>
>> Patch updated according to Timur's suggestions (needs regmap fix):
>> diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
>
> Tested your patch aga
There is no guarantee that on fsl_ssi module load
SSI registers will have their power-on-reset values.
In fact, if the driver is reloaded the values in
registers will be whatever they were set to previously.
However, the cache needs to be fully populated at probe
time to avoid non-atomic allocati
Hi Caleb,
[auto build test ERROR on asoc/for-next]
[also build test ERROR on v4.4 next-20160118]
[if your patch is applied to the wrong git tree, please drop us a note to help
improving the system]
url:
https://github.com/0day-ci/linux/commits/Caleb-Crome/ASoC-fsl_ssi-Set-watermark-and
On 01/18/2016 08:36 AM, Ganapatrao Kulkarni wrote:
Adding dt file for Cavium's Thunderx dual socket platform.
Signed-off-by: Ganapatrao Kulkarni
---
arch/arm64/boot/dts/cavium/Makefile | 2 +-
arch/arm64/boot/dts/cavium/thunder-88xx-2n.dts | 83 +++
arch/arm64/boot/dts/caviu
On 01/18/2016 08:36 AM, Ganapatrao Kulkarni wrote:
update numa_node of device associated with pci bus.
moved down devm_kzalloc to allocate from node memory.
Signed-off-by: Ganapatrao Kulkarni
---
drivers/pci/host/pci-host-generic.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(
On Mon, Jan 18, 2016 at 04:19:29PM +0800, Herbert Xu wrote:
> Paul E. McKenney wrote:
> >
> > You could use SYNC_ACQUIRE() to implement read_barrier_depends() and
> > smp_read_barrier_depends(), but SYNC_RMB probably does not suffice.
> > The reason for this is that smp_read_barrier_depends() must
> [S.H] the fsl backplane, e.g. 10GBASE-KR, needs software to handle link
> training,
> It's to train link partner, and trained by link partner parallel.
>
> But if media type is not copper, e.g. optical module, we won't need this.
So what we actually need to know is copper vs fibre?
Andrew
Hi Maciej,
On Sun, Jan 17, 2016 at 8:02 PM, Maciej S. Szmigiero
wrote:
> Patch updated according to Timur's suggestions (needs regmap fix):
> diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
Tested your patch against linux-next and it did not give me any warnings:
Tested-by: Fabi
- Original Message -
> From: "Raghavendra K T"
> To: mi...@redhat.com, pet...@infradead.org, b...@kernel.crashing.org,
> pau...@samba.org, m...@ellerman.id.au,
> an...@samba.org, a...@linux-foundation.org
> Cc: jstan...@redhat.com, gk...@linux.vnet.ibm.com, "grant likely"
> ,
> nik..
On Fri, Jan 18, 2016 at 05:10 PM, Li Yang wrote:
> -Original Message-
> From: pku@gmail.com [mailto:pku@gmail.com] On Behalf Of Li Yang
> Sent: Monday, January 18, 2016 5:10 PM
> To: Qiang Zhao
> Cc: devicet...@vger.kernel.org; lkml ;
> linuxppc-dev ; priyanka.j...@freescale.com;
>
On Wed, Jan 6, 2016 at 5:27 PM, Dan Carpenter wrote:
> Hello Li Yang,
>
> The patch 986585385131: "[POWERPC] Add QUICC Engine (QE)
> infrastructure" from Oct 3, 2006, leads to the following static
> checker warning:
>
> drivers/soc/fsl/qe/qe_ic.c:412 qe_ic_set_priority()
> error: b
On Fri, Jan 8, 2016 at 10:18 AM, Zhao Qiang wrote:
> Add uqe_serial document to
> Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
As you have submitted patch to move QE code from arch/powerpc into
drivers/soc/fsl for the reuse of ARM and powerpc, you should also
move the bind
> -Original Message-
> From: Sebastian Hesselbarth [mailto:sebastian.hesselba...@gmail.com]
> Sent: Monday, January 18, 2016 4:06 PM
> To: Shaohui Xie; Florian Fainelli; Andrew Lunn; shh@gmail.com
> Cc: devicet...@vger.kernel.org; net...@vger.kernel.org; linuxppc-
> d...@lists.ozlabs.or
> > If you look at the list of possible values for "phy-mode" you'd see
> > that none of it describes a PHY-to-PHY connection but all are for
> > MAC-to-PHY connections. Also, names above suggest it already: MII is
> > short for media _independent_ interface.
> >
> > I copy Andrew's concerns and th
Paul E. McKenney wrote:
>
> You could use SYNC_ACQUIRE() to implement read_barrier_depends() and
> smp_read_barrier_depends(), but SYNC_RMB probably does not suffice.
> The reason for this is that smp_read_barrier_depends() must order the
> pointer load against any subsequent read or write through
On 18.01.2016 08:23, Shaohui Xie wrote:
If you look at the list of possible values for "phy-mode" you'd see
that none of it describes a PHY-to-PHY connection but all are for
MAC-to-PHY connections. Also, names above suggest it already: MII is
short for media _independent_ interface.
I copy Andre
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