Re: [RFC PATCH V1 03/33] powerpc/mm: Switch book3s 64 with 64K page size to 4 level page table

2016-01-17 Thread Aneesh Kumar K.V
Balbir Singh writes: > On 12/01/16 18:15, Aneesh Kumar K.V wrote: >> This is needed so that we can support both hash and radix page table >> using single kernel. Radix kernel uses a 4 level table. >> . > diff --git a/arch/powerpc/include/asm/book3s/64/hash-64k.h > b/arch/powerpc/include/as

Re: [PATCH V2 8/8] powerpc: Add the ability to save VSX without giving it up

2016-01-17 Thread Michael Neuling
> > Also, put the #ifdef junk as part of the function so that the caller > > doesn't have to deal with it. > > > > Can do absolutely, however this means that in save_all I can't check if the > function needs to be called or not. For example, without CONFIG_VSX, MSR_VSX > won't exist which means

RE: [PATCH 3/6] QE: Add uqe_serial document to bindings

2016-01-17 Thread Qiang Zhao
Hi Rob, Please, is there any update regarding of my question? Thank you! Best Regards Zhao Qiang > -Original Message- > From: Qiang Zhao > Sent: Monday, January 11, 2016 4:19 PM > To: 'Rob Herring' > Cc: devicet...@vger.kernel.org; linux-ker...@vger.kernel.org; linuxppc- > d...@lists.oz

Re: [PATCH V2 8/8] powerpc: Add the ability to save VSX without giving it up

2016-01-17 Thread Cyril Bur
On Fri, 15 Jan 2016 17:25:26 +1100 Michael Neuling wrote: > On Fri, 2016-01-15 at 16:04 +1100, Cyril Bur wrote: > > This patch adds the ability to be able to save the VSX registers to > > the > > thread struct without giving up (disabling the facility) next time > > the > > process returns to use

Re: [PATCH V2 5/8] powerpc: Restore FPU/VEC/VSX if previously used

2016-01-17 Thread Cyril Bur
On Fri, 15 Jan 2016 17:02:41 +1100 Michael Neuling wrote: Hey Mikey, Thanks for the review, as always you're correct :). > > Can you make the inline code easier to read? Something like > > #ifdef CONFIG_ALTIVEC > #define loadvec(thr) ((thr).load_vec) > #else > #define loadvec(thr) 0 > #endif

[PATCH] powerpc: Simplify module TOC handling

2016-01-17 Thread Michael Ellerman
From: Alan Modra PowerPC64 uses the symbol .TOC. much as other targets use _GLOBAL_OFFSET_TABLE_. It identifies the value of the GOT pointer (or in powerpc parlance, the TOC pointer). Global offset tables are generally local to an executable or shared library, or in the kernel, module. Thus it do

Re: [PATCH 3/3] ASoC: fsl_ssi: remove register defaults

2016-01-17 Thread Maciej S. Szmigiero
On 17.01.2016 19:38, Timur Tabi wrote: > Maciej S. Szmigiero wrote: >> On 17.01.2016 15:16, Maciej S. Szmigiero wrote: >>> On 17.01.2016 06:16, Timur Tabi wrote: Maciej S. Szmigiero wrote: > This is because (at least according to the datasheet) imx21-class SSI > registers end at CCSR_S

Re: [PATCH 3/3] ASoC: fsl_ssi: remove register defaults

2016-01-17 Thread Timur Tabi
Maciej S. Szmigiero wrote: On 17.01.2016 15:16, Maciej S. Szmigiero wrote: On 17.01.2016 06:16, Timur Tabi wrote: Maciej S. Szmigiero wrote: This is because (at least according to the datasheet) imx21-class SSI registers end at CCSR_SSI_SRMSK (no SACC{ST,EN,DIS} regs), so reading them for cach

Re: [PATCH 3/3] ASoC: fsl_ssi: remove register defaults

2016-01-17 Thread Maciej S. Szmigiero
On 17.01.2016 15:16, Maciej S. Szmigiero wrote: > On 17.01.2016 06:16, Timur Tabi wrote: >> Maciej S. Szmigiero wrote: >>> This is because (at least according to the datasheet) imx21-class SSI >>> registers end at CCSR_SSI_SRMSK (no SACC{ST,EN,DIS} regs), so >>> reading them for cache initializatio

Re: [PATCH 3/3] ASoC: fsl_ssi: remove register defaults

2016-01-17 Thread Maciej S. Szmigiero
On 17.01.2016 06:16, Timur Tabi wrote: > Maciej S. Szmigiero wrote: >> This is because (at least according to the datasheet) imx21-class SSI >> registers end at CCSR_SSI_SRMSK (no SACC{ST,EN,DIS} regs), so >> reading them for cache initialization may not be safe. >> >> Also, a "MXC 91221 only" comm