On Wed, Nov 04, 2015 at 04:05:37PM +1100, Alexey Kardashevskiy wrote:
>On 11/04/2015 02:28 PM, Wei Yang wrote:
>>This patchset enables EEH on SRIOV VFs. The general idea is to create proper
>>VF edev and VF PE and handle them properly.
>>
>>Different from the Bus PE, VF PE just contain one VF. This
On Wed, Nov 04, 2015 at 04:01:50PM +1100, Alexey Kardashevskiy wrote:
>On 11/04/2015 02:28 PM, Wei Yang wrote:
>>PFs are enumerated on PCI bus, while VFs are created by PF's driver.
>>
>>In EEH recovery, it has two cases:
>>1. Device and driver is EEH aware, error handlers are called.
>>2. Device a
On 03/11/15 20:09, Michael Ellerman wrote:
Part of your problem is you're storing afu->crs_len which is not __iomem in
cfg_data which is, and so that's leading to some of your casts.
I don't really see why you're using cfg_data like that, you have the afu in
phb->private_data. But maybe cfg_data
Hi Michael,
On Tuesday 03 November 2015 02:46 PM, Michael Ellerman wrote:
On Tue, 2015-11-03 at 11:40 +0530, Anju T wrote:
The perf infrastructure uses a bit mask to find out
valid registers to display. Define a register mask
for supported registers defined in asm/perf_regs.h.
The bit positions
On Tuesday 03 November 2015 02:46 PM, Michael Ellerman wrote:
> On Tue, 2015-11-03 at 11:40 +0530, Anju T wrote:
>
>> The perf infrastructure uses a bit mask to find out
>> valid registers to display. Define a register mask
>> for supported registers defined in asm/perf_regs.h.
>> The bit positio
Hi Michael,
On Tuesday 03 November 2015 02:46 PM, Michael Ellerman wrote:
On Tue, 2015-11-03 at 11:40 +0530, Anju T wrote:
The perf infrastructure uses a bit mask to find out
valid registers to display. Define a register mask
for supported registers defined in asm/perf_regs.h.
The bit positions
On 11/04/2015 02:28 PM, Wei Yang wrote:
This patchset enables EEH on SRIOV VFs. The general idea is to create proper
VF edev and VF PE and handle them properly.
Different from the Bus PE, VF PE just contain one VF. This introduces the
difference of EEH error handling on a VF PE. Generally, it ha
On 11/04/2015 02:28 PM, Wei Yang wrote:
PFs are enumerated on PCI bus, while VFs are created by PF's driver.
In EEH recovery, it has two cases:
1. Device and driver is EEH aware, error handlers are called.
2. Device and driver is not EEH aware, un-plug the device and plug it again
by enumerating
Acked-by: Ian Munsie
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This restricts the EEH address cache to use only the first 7 BARs. This
makes __eeh_addr_cache_insert_dev() ignore PCI bridge window and IOV BARs.
As the result of this change, eeh_addr_cache_get_dev() will return VFs from
VF's resource addresses instead of parent PFs.
This removes extra check for
PFs are enumerated on PCI bus, while VFs are created by PF's driver.
In EEH recovery, it has two cases:
1. Device and driver is EEH aware, error handlers are called.
2. Device and driver is not EEH aware, un-plug the device and plug it again
by enumerating it.
The special thing happens on the sec
After PE reset, OPAL API opal_pci_reinit() is called on all devices
contained in the PE to reinitialize them. While skiboot is not aware of
VFs, we have to implement the function in kernel to reinitialize VFs after
reset on PE for VFs.
In this patch, two functions pnv_pci_fixup_vf_mps() and
pnv_ee
The patch creates PEs for VFs in the weak function
pcibios_bus_add_device(). Those PEs for VFs are identified with newly
introduced flag EEH_PE_VF so that we handle them differently during EEH
recovery.
Signed-off-by: Wei Yang
---
arch/powerpc/include/asm/eeh.h | 1 +
arch/powerpc
PEs for VFs don't have primary bus. So they have to have their own reset
backend, which is used during EEH recovery. The patch implements the reset
backend for VF's PE by issuing FLR or AF FLR to the VFs, which are contained
in the PE.
Signed-off-by: Wei Yang
---
arch/powerpc/include/asm/eeh.h
VFs and their corresponding pci_dn instances are created and released
dynamically as their PF's SRIOV capability is enabled and disabled.
The patch creates and releases EEH devices for VFs when creating and
releasing their pci_dn instances, which means EEH devices and pci_dn
instances have same lif
Add a weak function pcibios_bus_add_device() for arch dependent code could
do proper setup. For example, powerpc could setup EEH related resources.
Signed-off-by: Wei Yang
Acked-by: Bjorn Helgaas
---
drivers/pci/bus.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/pci/bus.c b/dr
As commit ac205b7bb72f ("PCI: make sriov work with hotplug remove")
indicates, VFs which is on the same PCI bus as their PF, should be removed
before the PF. Otherwise, the PCI hot unplugging of PCI devices on the PCI
bus would cause kernel crash.
The patch applies the above pattern to PowerPC PCI
During EEH recovery, hotplug is applied to the devices which don't
have drivers or their drivers don't support EEH. However, the hotplug,
which was implemented based on PCI bus, can't be applied to VF directly.
Rename virtn_{add,remove}() and export them so they can be used in PCI
hotplug during E
This patchset enables EEH on SRIOV VFs. The general idea is to create proper
VF edev and VF PE and handle them properly.
Different from the Bus PE, VF PE just contain one VF. This introduces the
difference of EEH error handling on a VF PE. Generally, it has several
differences.
First, the VF's re
When writing a value to config space, cxl_pcie_write_config() calls
cxl_pcie_config_info() to obtain a mask and shift value, shifts the new
value accordingly, then uses the mask to combine the shifted value with the
existing value at the address as part of a read-modify-write pattern.
Currently, w
On Mon, Nov 02, 2015 at 09:22:40AM +0800, Boqun Feng wrote:
> > On Tue, Oct 27, 2015 at 11:06:52AM +0800, Boqun Feng wrote:
> > > To summerize:
> > >
> > > patch 1(split to two), 3, 4(remove inc/dec implementation), 5, 6 sent as
> > > powerpc patches for powerpc next, patch 2(unmodified) sent as t
Hi Igal,
[auto build test ERROR on net/master]
[also ERROR on: v4.3 next-20151103]
url:
https://github.com/0day-ci/linux/commits/igal-liberman-freescale-com/Freescale-DPAA-FMan/20151103-003323
base: https://github.com/0day-ci/linux
igal-liberman-freescale-com/Freescale-DPAA-FMan/20151103
On Thu, Aug 06, 2015 at 02:11:43PM +1000, Gavin Shan wrote:
>unflatten_dt_node() is called recursively to unflatten FDT nodes
>with the assumption that FDT blob has only one root node, which
>isn't true when the FDT blob represents device sub-tree. This
>improves the function to supporting device s
On 03/11/15 23:20, Frederic Barrat wrote:
When the cxl driver creates a context, it stores the pid of the
calling task, and mistakenly increments the reference count of the
struct pid twice, once through get_task_pid(), once through
get_pid(). The reference count is only decremented once on detac
On 03/11/15 23:13, Frederic Barrat wrote:
When the cxl driver creates a context, it stores the pid of the
calling task, and mistakenly increments the reference count of the
struct pid twice, once through get_task_pid(), once through
get_pid(). The reference count is only decremented once on detac
Acked-by: Ian Munsie
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Acked-by: Ian Munsie
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On Tue, 3 Nov 2015 11:21:59 -0600
John Allen wrote:
> This patch fixes a bug where a kernel warning is triggered when performing
> a memory hotplug on ppc64. This warning may also occur on any architecture
> that has multiple sections per memory block.
>
> [ 78.300767] [ cut here
This patch fixes a bug where a kernel warning is triggered when performing
a memory hotplug on ppc64. This warning may also occur on any architecture
that has multiple sections per memory block.
[ 78.300767] [ cut here ]
[ 78.300768] WARNING: at ../drivers/base/memory.c
On 11/02/2015 02:51 PM, John Allen wrote:
> This patch fixes a bug where a kernel warning is triggered when performing
> a memory hotplug on ppc64. This warning may also occur on any architecture
> that has multiple sections per memory block.
>
> [ 78.300767] [ cut here ]
On Tue, Nov 03, 2015 at 05:18:24AM -0800, Christoph Hellwig wrote:
> On Fri, Oct 30, 2015 at 02:35:11PM -0700, Nishanth Aravamudan wrote:
> > diff --git a/drivers/block/nvme-core.c b/drivers/block/nvme-core.c
> > index ccc0c1f93daa..a9a5285bdb39 100644
> > --- a/drivers/block/nvme-core.c
> > +++ b/
> -Original Message-
> From: Joakim Tjernlund [mailto:joakim.tjernl...@transmode.se]
>
> On Tue, 2015-11-03 at 09:37 +, Madalin-Cristian Bucur wrote:
> > > -Original Message-
> > > From: Joakim Tjernlund [mailto:joakim.tjernl...@transmode.se]
> > >
> > > On Mon, 2015-11-02 at 1
On Tue, Nov 03, 2015 at 09:06:42PM +1100, Michael Ellerman wrote:
> On Thu, 2015-10-29 at 22:10 +0300, Denis Kirjanov wrote:
>
> > ./drmgr -c cpu -a -r gives the following warning:
> >
> > [ 2327.035563] RCU used illegally from offline CPU! rcu_scheduler_active =
> > 1, debug_locks = 1
> > [ 23
On Fri, Oct 30, 2015 at 02:35:11PM -0700, Nishanth Aravamudan wrote:
> diff --git a/drivers/block/nvme-core.c b/drivers/block/nvme-core.c
> index ccc0c1f93daa..a9a5285bdb39 100644
> --- a/drivers/block/nvme-core.c
> +++ b/drivers/block/nvme-core.c
> @@ -1717,7 +1717,12 @@ static int nvme_configure_
On 11/3/15, Michael Ellerman wrote:
> On Thu, 2015-10-29 at 22:10 +0300, Denis Kirjanov wrote:
>
>> ./drmgr -c cpu -a -r gives the following warning:
>>
>> [ 2327.035563] RCU used illegally from offline CPU! rcu_scheduler_active
>> = 1, debug_locks = 1
>> [ 2327.035564] no locks held by swapper/1
When the cxl driver creates a context, it stores the pid of the
calling task, and mistakenly increments the reference count of the
struct pid twice, once through get_task_pid(), once through
get_pid(). The reference count is only decremented once on detach. As
a result, a struct pid is leaked and i
When the cxl driver creates a context, it stores the pid of the
calling task, and mistakenly increments the reference count of the
struct pid twice, once through get_task_pid(), once through
get_pid(). The reference count is only decremented once on detach. As
a result, a struct pid is leaked and i
On Tue, 2015-11-03 at 09:37 +, Madalin-Cristian Bucur wrote:
> > -Original Message-
> > From: Joakim Tjernlund [mailto:joakim.tjernl...@transmode.se]
> >
> > On Mon, 2015-11-02 at 19:31 +0200, Madalin Bucur wrote:
> > > + if (unlikely(fd_status & FM_FD_STAT_RX_ERRORS) != 0) {
> >
Teach tags.sh about the powerpc PCI macros, eg. readl/writel etc.
Signed-off-by: Michael Ellerman
---
scripts/tags.sh | 1 +
1 file changed, 1 insertion(+)
Sorry to send another of these, I had a nagging feeling I'd missed some macros
when I sent the last one.
This applies on top of linux-next
On Thu, 2015-10-29 at 22:10 +0300, Denis Kirjanov wrote:
> ./drmgr -c cpu -a -r gives the following warning:
>
> [ 2327.035563] RCU used illegally from offline CPU! rcu_scheduler_active =
> 1, debug_locks = 1
> [ 2327.035564] no locks held by swapper/12/0.
> [ 2327.035565] stack backtrace:
> [
> -Original Message-
> From: Joe Perches [mailto:j...@perches.com]
>
> On Mon, 2015-11-02 at 19:31 +0200, Madalin Bucur wrote:
> > Add support for Scater/Gather (S/G) frames. The FMan can place
> > the frame content into multiple buffers and provide a S/G Table
> > (SGT) into one first buf
> -Original Message-
> From: Joakim Tjernlund [mailto:joakim.tjernl...@transmode.se]
>
> On Mon, 2015-11-02 at 19:31 +0200, Madalin Bucur wrote:
> > + if (unlikely(fd_status & FM_FD_STAT_RX_ERRORS) != 0) {
> > + if (net_ratelimit())
> > + netif_war
On Tue, 2015-11-03 at 10:38 +0530, Aneesh Kumar K.V wrote:
> Paul Mackerras writes:
> > On Wed, Oct 21, 2015 at 01:42:26AM +0530, Aneesh Kumar K.V wrote:
> > > Hi,
> > >
> > > This patch series is on top of the series posted at
> > >
> > > https://lists.ozlabs.org/pipermail/linuxppc-dev/2015-Oc
> -Original Message-
> From: Wood Scott-B07421
> Sent: Tuesday, November 03, 2015 1:07 PM
> To: Dogra Raghav-B46184
> Cc: Kushwaha Prabhakar-B32579 ; linuxppc-
> d...@lists.ozlabs.org
> Subject: Re: [PATCH 1/2] mpc85xx/lbc: modify suspend/resume entry
> sequence
>
> On Tue, 2015-11-03 a
On Tue, 2015-11-03 at 11:40 +0530, Anju T wrote:
> The perf infrastructure uses a bit mask to find out
> valid registers to display. Define a register mask
> for supported registers defined in asm/perf_regs.h.
> The bit positions also correspond to register IDs
> which is used by perf infrastructu
On Tue, 2015-11-03 at 09:17 +0100, Frederic Barrat wrote:
> Le 03/11/2015 00:48, Ian Munsie a écrit :
> >
> > Looks like we managed to introduce the same bug twice (d'oh!), so we
> > should probably split this into two separate patches:
> >
> > The bug in file.c has existed forever so the fix for
On Wed, 2015-10-28 at 14:29 +1100, Andrew Donnellan wrote:
> sparse identifies the following issues:
>
> drivers/misc/cxl/vphb.c:131:17: warning: incorrect type in assignment
> (different address spaces)
> drivers/misc/cxl/vphb.c:131:17:expected void volatile [noderef]
> *
> dri
Le 03/11/2015 00:48, Ian Munsie a écrit :
Excerpts from Michael Ellerman's message of 2015-11-02 11:53:45 +1100:
On Thu, 2015-10-29 at 13:39 +0100, Frederic Barrat wrote:
When the cxl driver creates a context, it stores the pid of the
calling task, incrementing the reference count on the str
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