[PATCH 2/2] powerpc/fsl_lbc: removal of dead code

2015-10-30 Thread Raghav Dogra
The condition check is not used. Signed-off-by: Raghav Dogra --- arch/powerpc/sysdev/fsl_lbc.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/powerpc/sysdev/fsl_lbc.c b/arch/powerpc/sysdev/fsl_lbc.c index 332d700..a41d281 100644 --- a/arch/powerpc/sysdev/fsl_lbc.c +++ b/arch/powerpc/s

[PATCH 1/2] mpc85xx/lbc: modify suspend/resume entry sequence

2015-10-30 Thread Raghav Dogra
Modify platform driver suspend/resume to syscore suspend/resume. This is because p1022ds needs to use localbus when entering the PCIE resume. Signed-off-by: Raghav Dogra --- arch/powerpc/sysdev/Makefile | 2 +- arch/powerpc/sysdev/fsl_lbc.c | 51 +-- 2 f

[PATCH] nx-842: Ignore bit 3 of condition register returned by icswx

2015-10-30 Thread Ram Pai
icswx occasionally under heavy load sets bit 3 of condition register 0. It has no software implication. Currently that bit is interpreted by the driver as a failure, when it should have calmly ignored it. Signed-off-by: Ram Pai --- arch/powerpc/include/asm/icswx.h |2 +- 1 files changed, 1

Re: [PATCH 1/1 v3] drivers/nvme: default to 4k device page size

2015-10-30 Thread Nishanth Aravamudan
On 30.10.2015 [21:48:48 +], Keith Busch wrote: > On Fri, Oct 30, 2015 at 02:35:11PM -0700, Nishanth Aravamudan wrote: > > Given that it's 4K just about everywhere by default (and sort of > > implicitly expected to be, I guess), I think I'd prefer we default to > > 4K. That should mitigate the p

[PATCH] Endian swap ->count before handing over to the nx-842 compressor

2015-10-30 Thread Ram Pai
The nx-842 compressor overshoots the output buffer corrupting memory. Verified that the following patch the issue on a LE system. Signed-off-by: Ram Pai --- drivers/crypto/nx/nx-842-powernv.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/crypto/nx/nx-842-power

Re: [PATCH 1/1 v3] drivers/nvme: default to 4k device page size

2015-10-30 Thread Keith Busch
On Fri, Oct 30, 2015 at 02:35:11PM -0700, Nishanth Aravamudan wrote: > Given that it's 4K just about everywhere by default (and sort of > implicitly expected to be, I guess), I think I'd prefer we default to > 4K. That should mitigate the performance impact (I'll ask our IO team to > do some runs,

Re: [PATCH 0/5 v3] Fix NVMe driver support on Power with 32-bit DMA

2015-10-30 Thread Nishanth Aravamudan
On 29.10.2015 [18:49:55 -0700], David Miller wrote: > From: Nishanth Aravamudan > Date: Thu, 29 Oct 2015 08:57:01 -0700 > > > So, would that imply changing just the NVMe driver code rather than > > adding the dma_page_shift API at all? What about > > architectures that can support the larger page

[PATCH 1/1 v3] drivers/nvme: default to 4k device page size

2015-10-30 Thread Nishanth Aravamudan
On 29.10.2015 [17:20:43 +], Busch, Keith wrote: > On Thu, Oct 29, 2015 at 08:57:01AM -0700, Nishanth Aravamudan wrote: > > On 29.10.2015 [04:55:36 -0700], Christoph Hellwig wrote: > > > We had a quick cht about this issue and I think we simply should > > > default to a NVMe controler page size

Re: [PATCH 1/2] mpc85xx/lbc: modify suspend/resume entry sequence

2015-10-30 Thread Scott Wood
On Fri, 2015-10-30 at 11:54 +0530, Raghav Dogra wrote: > Modify platform driver suspend/resume to syscore > suspend/resume. This is because p1022ds needs to use > localbus when entering the PCIE resume. > > Signed-off-by: Raghav Dogra > --- > arch/powerpc/sysdev/Makefile | 2 +- > arch/powerpc

Re: [ANNOUNCE] kexec-tools 2.0.11-rc1

2015-10-30 Thread Scott Wood
On Fri, 2015-10-30 at 17:12 +0900, Simon Horman wrote: > On Thu, Oct 29, 2015 at 07:23:24PM -0500, Scott Wood wrote: > > On Fri, 2015-10-30 at 08:48 +0900, Simon Horman wrote: > > > Hi all, > > > > > > I am happy to announce the release of kexec-tools 2.0.11-rc1. > > > > > > This is an incrementa

Re: [PATCH] cxl: sparse: add __iomem annotations in vphb.c

2015-10-30 Thread Arnd Bergmann
On Wednesday 28 October 2015 14:29:39 Andrew Donnellan wrote: > --- a/drivers/misc/cxl/vphb.c > +++ b/drivers/misc/cxl/vphb.c > @@ -128,7 +128,7 @@ static int cxl_pcie_config_info(struct pci_bus *bus, > unsigned int devfn, > return PCIBIOS_BAD_REGISTER_NUMBER; > addr = cxl_

Re: [PATCH V10 09/12] powerpc/powernv: Support PCI config restore for VFs

2015-10-30 Thread Wei Yang
On Fri, Oct 30, 2015 at 03:56:12PM +1100, Alexey Kardashevskiy wrote: >On 10/26/2015 02:15 PM, Wei Yang wrote: >>After PE reset, OPAL API opal_pci_reinit() is called on all devices >>contained in the PE to reinitialize them. However, VFs can't be seen >>from skiboot firmware. We have to implement t

Re: [ANNOUNCE] kexec-tools 2.0.11-rc1

2015-10-30 Thread Simon Horman
On Thu, Oct 29, 2015 at 07:23:24PM -0500, Scott Wood wrote: > On Fri, 2015-10-30 at 08:48 +0900, Simon Horman wrote: > > Hi all, > > > > I am happy to announce the release of kexec-tools 2.0.11-rc1. > > > > This is an incremental feature pre-release. > > > > So long as no serious problems arise

Re: [PATCH V10 08/12] powerpc/powernv: Support EEH reset for VF PE

2015-10-30 Thread Alexey Kardashevskiy
On 10/30/2015 06:18 PM, Wei Yang wrote: On Fri, Oct 30, 2015 at 03:11:20PM +1100, Alexey Kardashevskiy wrote: On 10/26/2015 02:15 PM, Wei Yang wrote: PEs for VFs don't have primary bus. So they have to have their own reset backend, which is used during EEH recovery. The patch implements the res

Re: [PATCH V10 06/12] powerpc/powernv: EEH device for VF

2015-10-30 Thread Wei Yang
On Fri, Oct 30, 2015 at 06:36:01PM +1100, Alexey Kardashevskiy wrote: >On 10/30/2015 05:52 PM, Wei Yang wrote: >>On Fri, Oct 30, 2015 at 02:33:49PM +1100, Alexey Kardashevskiy wrote: >>>On 10/26/2015 02:15 PM, Wei Yang wrote: VFs and their corresponding pci_dn instances are created and released

Re: [PATCH V2 3/3] perf/powerpc :add support for sampling intr machine state

2015-10-30 Thread Madhavan Srinivasan
On Monday 26 October 2015 06:14 PM, Anju T wrote: > The registers to sample are passed through the sample_regs_intr bitmask. > The name and bit position for each register is defined in asm/perf_regs.h. > This feature can be enabled by using -I option with perf record command. > To display the sa

Re: [PATCH V10 06/12] powerpc/powernv: EEH device for VF

2015-10-30 Thread Alexey Kardashevskiy
On 10/30/2015 05:52 PM, Wei Yang wrote: On Fri, Oct 30, 2015 at 02:33:49PM +1100, Alexey Kardashevskiy wrote: On 10/26/2015 02:15 PM, Wei Yang wrote: VFs and their corresponding pci_dn instances are created and released dynamically as their PF's SRIOV capability is enabled and disabled. The pat

Re: [PATCH V10 12/12] powerpc/eeh: Handle hot removed VF when PF is EEH aware

2015-10-30 Thread Wei Yang
On Fri, Oct 30, 2015 at 04:35:54PM +1100, Alexey Kardashevskiy wrote: >On 10/26/2015 02:16 PM, Wei Yang wrote: >>When PF is EEH aware while VFs are not, VFs will be removed during EEH >>recovery. This is not supported in current code, while will leads to the VF >>lost. >> >>This patch fixes this by

Re: [PATCH V10 11/12] powerpc/eeh: Don't block PCI config on resetting VF PE

2015-10-30 Thread Wei Yang
On Fri, Oct 30, 2015 at 04:42:07PM +1100, Alexey Kardashevskiy wrote: >On 10/26/2015 02:16 PM, Wei Yang wrote: >>From: Gavin Shan >> >>When passing through SRIOV VF from host to guest via VFIO PCI >>infrastructure, the VF is resetted by EEH specific backend >>(pcibios_set_pcie_reset_state()). We c

Re: [PATCH V10 08/12] powerpc/powernv: Support EEH reset for VF PE

2015-10-30 Thread Wei Yang
On Fri, Oct 30, 2015 at 03:11:20PM +1100, Alexey Kardashevskiy wrote: >On 10/26/2015 02:15 PM, Wei Yang wrote: >>PEs for VFs don't have primary bus. So they have to have their own reset >>backend, which is used during EEH recovery. The patch implements the reset >>backend for VF's PE by issuing FLR

Re: [PATCH V10 07/12] powerpc/eeh: Create PE for VFs

2015-10-30 Thread Wei Yang
On Fri, Oct 30, 2015 at 02:46:35PM +1100, Alexey Kardashevskiy wrote: >On 10/26/2015 02:15 PM, Wei Yang wrote: >>Current EEH recovery code works with the assumption: the PE has primary >>bus. Unfortunately, that's not true for VF PEs, which generally contains >>one or multiple VFs (for VF group cas