Re: [PATCH v6 22/22] of/platform: Defer probes of registered devices

On Wed, Oct 28, 2015 at 9:40 AM, Tomeu Vizoso wrote: > On 22 October 2015 at 23:27, Scott Wood wrote: >> On Thu, 2015-10-22 at 15:04 +0200, Tomeu Vizoso wrote: >>> On 22 October 2015 at 00:51, Scott Wood wrote: >>> > On Wed, 2015-10-21 at 08:44 -0500, Rob Herring wrote: >>> > > On Wed, Oct 21, 2

Re: [PATCH V10 05/12] powerpc/eeh: Cache only BARs, not windows or IOV BARs

Wei Yang writes: > EEH address cache, which helps to locate the PCI device according to > the given (physical) MMIO address, didn't cover PCI bridges. Also, it > shouldn't return PF with address in PF's IOV BARs. Instead, the VFs > should be returned. > > Also, by doing so, it removes the type ch

Re: [RFC PATCH 0/7] Remove 4k subpage tracking with hash 64K config

On Wed, Oct 21, 2015 at 01:42:26AM +0530, Aneesh Kumar K.V wrote: > Hi, > > This patch series is on top of the series posted at > > https://lists.ozlabs.org/pipermail/linuxppc-dev/2015-October/135299.html > "[PATCH V4 00/31] powerpc/mm: Update page table format for book3s 64". In this > series w

[PATCH 14/19] powerpc: Add ppc_strict_facility_enable boot option

Add a boot option that strictly manages the MSR unavailable bits. This catches kernel uses of FP/Altivec/SPE that would otherwise corrupt user state. Signed-off-by: Anton Blanchard --- Documentation/kernel-parameters.txt | 6 ++ arch/powerpc/include/asm/reg.h | 9 + arch/pow

[PATCH 19/19] powerpc: clean up asm/switch_to.h

Remove a bunch of unnecessary fallback functions and group things in a more logical way. Signed-off-by: Anton Blanchard --- arch/powerpc/include/asm/switch_to.h | 35 ++- arch/powerpc/kernel/process.c| 2 +- 2 files changed, 11 insertions(+), 26 deletions

[PATCH 11/19] crypto: vmx: Only call enable_kernel_vsx()

With the recent change to enable_kernel_vsx(), we no longer need to call enable_kernel_fp() and enable_kernel_altivec(). Signed-off-by: Anton Blanchard --- drivers/crypto/vmx/aes.c | 3 --- drivers/crypto/vmx/aes_cbc.c | 3 --- drivers/crypto/vmx/aes_ctr.c | 3 --- drivers/crypto/vmx/ghash.c

[PATCH 13/19] powerpc: Create disable_kernel_{fp,altivec,vsx,spe}()

The enable_kernel_*() functions leave the relevant MSR bits enabled until we exit the kernel sometime later. Create disable versions that wrap the kernel use of FP, Altivec VSX or SPE. While we don't want to disable it normally for performance reasons (MSR writes are slow), it will be used for a d

[PATCH 18/19] powerpc: Rearrange __switch_to()

Most of __switch_to() is housekeeping, TLB batching, timekeeping etc. Move these away from the more complex and critical context switching code. Signed-off-by: Anton Blanchard --- arch/powerpc/kernel/process.c | 52 +-- 1 file changed, 26 insertions(+), 26

[PATCH 15/19] powerpc: Remove fp_enable() and vec_enable(), use msr_check_and_{set, clear}()

More consolidation of our MSR available bit handling. Signed-off-by: Anton Blanchard --- arch/powerpc/include/asm/processor.h | 2 -- arch/powerpc/kernel/fpu.S| 16 arch/powerpc/kernel/process.c| 6 -- arch/powerpc/kernel/vector.S | 10 -

[PATCH 17/19] powerpc: create flush_all_to_thread()

Create a single function that flushes everything (FP, VMX, VSX, SPE). Doing this all at once means we only do one MSR write. Signed-off-by: Anton Blanchard --- arch/powerpc/include/asm/switch_to.h | 1 + arch/powerpc/kernel/process.c| 22 ++ arch/powerpc/kernel/swsus

[PATCH 16/19] powerpc: create giveup_all()

Create a single function that gives everything up (FP, VMX, VSX, SPE). Doing this all at once means we only do one MSR write. A context switch microbenchmark using yield(): http://ozlabs.org/~anton/junkcode/context_switch2.c ./context_switch2 --test=yield --fp --altivec --vector 0 0 shows an im

[PATCH 10/19] powerpc: Move part of giveup_vsx into c

Move the MSR modification into c. Removing it from the assembly function will allow us to avoid costly MSR writes by batching them up. Check the FP and VMX bits before calling the relevant giveup_*() function. This makes giveup_vsx() and flush_vsx_to_thread() perform more like their sister functio

[PATCH 12/19] powerpc: Create msr_check_and_{set,clear}()

Create helper functions to set and clear MSR bits after first checking if they are already set. Grouping them will make it easy to avoid the MSR writes in a subsequent optimisation. Signed-off-by: Anton Blanchard --- arch/powerpc/kernel/process.c | 107 --

[PATCH 09/19] powerpc: Move part of giveup_fpu,altivec,spe into c

Move the MSR modification into new c functions. Removing it from the low level functions will allow us to avoid costly MSR writes by batching them up. Move the check_if_tm_restore_required() check into these new functions. Signed-off-by: Anton Blanchard --- arch/powerpc/include/asm/switch_to.h

[PATCH 08/19] powerpc: Remove NULL task struct pointer checks in FP and vector code

We used to allow giveup_*() to be called with a NULL task struct pointer. Now those cases are handled in the caller we can remove the checks. We can also remove giveup_altivec_notask() which is also unused. Signed-off-by: Anton Blanchard --- arch/powerpc/include/asm/switch_to.h | 1 - arch/powe

[PATCH 07/19] powerpc: Create mtmsrd_isync()

mtmsrd_isync() will do an mtmsrd followed by an isync on older processors. On newer processors we avoid the isync via a feature fixup. Signed-off-by: Anton Blanchard --- arch/powerpc/include/asm/reg.h | 8 arch/powerpc/kernel/process.c | 30 ++ 2 files chan

[PATCH 06/19] powerpc: Simplify TM restore checks

Instead of having multiple giveup_*_maybe_transactional() functions, separate out the TM check into a new function called check_if_tm_restore_required(). This will make it easier to optimise the giveup_*() functions in a subsequent patch. Signed-off-by: Anton Blanchard --- arch/powerpc/kernel/p

[PATCH 05/19] powerpc: Remove UP only lazy floating point and vector optimisations

The UP only lazy floating point and vector optimisations were written back when SMP was not common, and neither glibc nor gcc used vector instructions. Now SMP is very common, glibc aggressively uses vector instructions and gcc autovectorises. We want to add new optimisations that apply to both UP

[PATCH 04/19] powerpc: Remove redundant mflr in _switch

No need to execute mflr twice. Signed-off-by: Anton Blanchard --- arch/powerpc/kernel/entry_64.S | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S index e84e5bc..c8b4225 100644 --- a/arch/powerpc/kernel/entry_64

[PATCH 03/19] powerpc: Create context switch helpers save_sprs() and restore_sprs()

Move all our context switch SPR save and restore code into two helpers. We do a few optimisations: - Group all mfsprs and all mtsprs. In many cases an mtspr sets a scoreboarding bit that an mfspr waits on, so the current practise of mfspr A; mtspr A; mfpsr B; mtspr B is the worst scheduling we can

[PATCH 02/19] powerpc: Don't disable MSR bits in do_load_up_transact_*() functions

Similar to the non TM load_up_*() functions, don't disable the MSR bits on the way out. Signed-off-by: Anton Blanchard --- arch/powerpc/kernel/fpu.S| 4 arch/powerpc/kernel/vector.S | 4 2 files changed, 8 deletions(-) diff --git a/arch/powerpc/kernel/fpu.S b/arch/powerpc/kernel/f

[PATCH 01/19] powerpc: Don't disable kernel FP/VMX/VSX MSR bits on context switch

Writing the MSR is slow, so we want to avoid it whenever possible. A subsequent patch will add a debug option that strictly manages the FP/VMX/VSX unavailable bits. For now just remove it, matching what we do in other areas of the kernel (eg enable_kernel_altivec()). A context switch microbenchma

[PATCH 00/19] Context switch improvements

Here are various improvements to our context switch path. Some of the highlights: - Group all mfsprs and mtsprs in __switch_to(), which gives us a 10% improvement on POWER8. - Create giveup_all() and flush_all_to_thread() so we only write the MSR once, which gives us a 3% improvement on POWER

Pull request: scottwood/linux.git next

Highlights include 64-bit book3e kexec/kdump support, a rework of the qoriq clock driver, device tree changes including qoriq fman nodes, support for a new 85xx board, and some fixes. Note that there is a trivial merge conflict with the clock tree's next branch, in the clock Makefile. The followi

Re: [V5, 2/6] fsl/fman: Add FMan support

On Tue, 2015-10-27 at 11:32 -0500, Liberman Igal-B31950 wrote: > > > + > > > +struct device *fman_get_device(struct fman *fman) { > > > + return fman->dev; > > > +} > > > > Is this really necessary? > > > > Fman port needs fman->dev, fman structure is opaque, so yes, it's needed. Why is opacit

Re: [PATCH v9 1/4] perf, kvm/{x86, s390}: Remove dependency on uapi/kvm_perf.h

Hemant Kumar writes: > Hi David, > > > On 10/07/2015 09:41 PM, David Ahern wrote: >> On 10/6/15 8:25 PM, Hemant Kumar wrote: >>> @@ -358,7 +357,12 @@ static bool handle_end_event(struct >>> perf_kvm_stat *kvm, >>> time_diff = sample->time - time_begin; >>> >>> if (kvm->duration && tim

Re: [PATCH v6 22/22] of/platform: Defer probes of registered devices

On 22 October 2015 at 23:27, Scott Wood wrote: > On Thu, 2015-10-22 at 15:04 +0200, Tomeu Vizoso wrote: >> On 22 October 2015 at 00:51, Scott Wood wrote: >> > On Wed, 2015-10-21 at 08:44 -0500, Rob Herring wrote: >> > > On Wed, Oct 21, 2015 at 12:54 AM, Scott Wood >> > > wrote: >> > > > On Mon,

Re: [PATCH 0/5 v3] Fix NVMe driver support on Power with 32-bit DMA

On Tue, Oct 27, 2015 at 05:54:43PM -0700, David Miller wrote: > From: "Busch, Keith" > Date: Tue, 27 Oct 2015 22:36:43 + > > > If you're suggesting to compile-time break architectures that currently > > work just fine with NVMe, let me stop you right there. > > Silently "working" without the

[v6, 6/6] fsl/fman: Add FMan MAC driver

From: Igal Liberman This patch adds the Ethernet MAC driver supporting the three different types of MACs: dTSEC, tGEC and mEMAC. Signed-off-by: Igal Liberman --- drivers/net/ethernet/freescale/fman/Makefile |3 +- drivers/net/ethernet/freescale/fman/mac.c| 980

[v6, 5/6] fsl/fman: Add FMan Port Support

From: Igal Liberman Add the Data Path Acceleration Architecture Frame Manger Port Driver. The FMan driver uses a module called "Port" to represent the physical TX and RX ports. Each FMan version has different number of physical ports. This patch adds The FMan Port configuration, initialization an

[v6, 4/6] fsl/fman: Add FMan SP support

From: Igal Liberman The Storage Profiles contain parameters that are used by the FMan for frame reception and transmission. Signed-off-by: Igal Liberman --- drivers/net/ethernet/freescale/fman/Makefile |2 +- drivers/net/ethernet/freescale/fman/fman_sp.c | 167 +

[v6, 2/6] fsl/fman: Add FMan support

From: Igal Liberman Add the Data Path Acceleration Architecture Frame Manger Driver. The FMan embeds a series of hardware blocks that implement a group of Ethernet interfaces. This patch adds The FMan configuration, initialization and runtime control routines. The FMan driver supports several ha

[v6, 1/6] fsl/fman: Add FMan MURAM support

From: Igal Liberman Add Frame Manager Multi-User RAM support. This internal FMan memory block is used by the FMan hardware modules, the management being made through the generic allocator. The FMan Internal memory, for example, is used for allocating transmit and receive FIFOs. Signed-off-by: I

[v6, 0/6] Freescale DPAA FMan

From: Igal Liberman The Freescale Data Path Acceleration Architecture (DPAA) is a set of hardware components on specific QorIQ multicore processors. This architecture provides the infrastructure to support simplified sharing of networking interfaces and accelerators by multiple CPU cores and the

Re: [PATCH 3/9] powerpc32: checksum_wrappers_64 becomes checksum_wrappers

Hi Scott, > I wonder why it was 64-bit specific in the first place. I think it was part of a series where I added my 64bit assembly checksum routines, and I didn't step back and think that the wrapper code would be useful on 32 bit. Anton ___ Linuxppc-

Re: [PATCH V2 1/3] perf/powerpc:add ability to sample intr machine state in power

On Monday 26 October 2015 06:14 PM, Anju T wrote: > The enum definition assigns an 'id' to each register in "struct pt_regs" > of arch/powerpc.The order of these values in the enum definition are > based on the corresponding macros in > arch/powerpc/include/uapi/asm/ptrace.h . > > Signed-off-b

Re: powerpc/dma: dma_set_coherent_mask() should not be GPL only

On Tue, 2015-27-10 at 06:02:42 UTC, Benjamin Herrenschmidt wrote: > When turning this from inline to an exported function I was a bit > over-eager and made it GPL only. This prevents the use of pretty much > all non-GPL PCI driver which is a bit over the top. Let's bring it > back in line with othe

[GIT PULL] Please pull powerpc/linux.git powerpc-4.3-6 tag

Hi Linus, Please pull one more powerpc fix for 4.3: The following changes since commit 8832317f662c06f5c06e638f57bfe89a71c9b266: powerpc/rtas: Validate rtas.entry before calling enter_rtas() (2015-10-22 11:03:25 +1100) are available in the git repository at: git://git.kernel.org/pub/scm/l