On 2015/07/17 19:51, Ananth N Mavinakayanahalli wrote:
> To be used for features we will not support on a particular architecture.
> The git log that adds this needs to provide the justification 'why?'
>
> Signed-off-by: Ananth N Mavinakayanahalli
> ---
> Documentation/features/arch-support.txt
[[PATCH] macintosh/ans-lcd: fix build failure after module_init/exit
relocation] On 17/07/2015 (Fri 14:20) Luis Henriques wrote:
> After commit 0fd972a7d91d ("module: relocate module_init from init.h to
> module.h")
> ans-lcd module fails to build with:
>
> drivers/macintosh/ans-lcd.c:201:1: wa
On 2015/07/16 19:56, Ananth N Mavinakayanahalli wrote:
> Kprobes uses a breakpoint instruction to trap into execution flow
> and the probed instruction is single-stepped from an alternate location.
>
> On some architectures like x86, under certain conditions, the OPTPROBES
> feature enables replac
From: Tiejun Chen
Allow KEXEC for book3e, and bypass or convert non-book3e stuff
in kexec code.
Signed-off-by: Tiejun Chen
[scottw...@freescale.com: move code to minimize diff, and cleanup]
Signed-off-by: Scott Wood
---
arch/powerpc/Kconfig | 2 +-
arch/powerpc/kernel/machi
book3e_secondary_core_init will only create a TLB entry if r4 = 0,
so do so.
Signed-off-by: Scott Wood
---
arch/powerpc/kernel/misc_64.S | 4
1 file changed, 4 insertions(+)
diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S
index c5915f0..fb955d9 100644
--- a/arch/
The way VIRT_PHYS_OFFSET is not correct on book3e-64, because
it does not account for CONFIG_RELOCATABLE other than via the
32-bit-only virt_phys_offset.
book3e-64 can (and if the comment about a GCC miscompilation is still
relevant, should) use the normal ppc64 __va/__pa.
At this point, only boo
booted_from_exec is similar to __run_at_load, except that it is set for
regular kexec as well as kdump.
The flag is needed because the SMP release mechanism for FSL book3e is
different from when booting with normal hardware. In theory we could
simulate the normal spin table mechanism, but not at
From: Tiejun Chen
book3e has no real MMU mode so we have to create an identity TLB
mapping to make sure we can access the real physical address.
Signed-off-by: Tiejun Chen
[scottwood: cleanup, and split off some changes]
Signed-off-by: Scott Wood
---
arch/powerpc/kernel/misc_64.S | 52 +++
This limit only makes sense on book3s, and on book3e it can cause
problems with kdump if we don't have any memory under 256 MiB.
Signed-off-by: Scott Wood
---
arch/powerpc/kernel/paca.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/paca.c b/arch/pow
While book3e doesn't have "real mode", we still want to wait for
all the non-crash cpus to complete their shutdown.
Signed-off-by: Scott Wood
---
arch/powerpc/kernel/crash.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/kernel/crash.c b/arch/powerpc/kerne
From: Tiejun Chen
book3e is different with book3s since 3s includes the exception
vectors code in head_64.S as it relies on absolute addressing
which is only possible within this compilation unit. So we have
to get that label address with got.
And when boot a relocated kernel, we should reset ip
From: Tiejun Chen
Convert r4/r5, not r6, to a virtual address when calling
copy_and_flush. Otherwise, r3 is already virtual, and copy_to_flush
tries to access r3+r6, PAGE_OFFSET gets added twice.
This isn't normally seen because on book3e we normally enter with
the kernel at zero and thus skip
From: Tiejun Chen
Rename 'interrupt_end_book3e' to '__end_interrupts' so that the symbol
can be used by both book3s and book3e.
Signed-off-by: Tiejun Chen
[scottwood: edit changelog]
Signed-off-by: Scott Wood
---
arch/powerpc/kernel/exceptions-64e.S | 8
1 file changed, 4 insertions(
The new kernel will be expecting secondary threads to be disabled,
not spinning.
Signed-off-by: Scott Wood
---
arch/powerpc/kernel/head_64.S | 16 +
arch/powerpc/platforms/85xx/smp.c | 48 +++
2 files changed, 64 insertions(+)
diff --git a/arc
From: Tiejun Chen
Unlike 32-bit 85xx kexec, we don't do a core reset.
Signed-off-by: Tiejun Chen
[scottwood: edit changelog, and cleanup]
Signed-off-by: Scott Wood
---
arch/powerpc/platforms/85xx/smp.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/powerpc/platforms/85x
This is required for kdump to work when loaded at at an address that
does not fall within the first TLB entry -- which can easily happen
because while the lower limit is enforced via reserved memory, which
doesn't affect how much is mapped, the upper limit is enforced via a
different mechanism that
Problems have been observed in coreint (EPR) mode if interrupts are
left pending (due to the lack of device quiescence with kdump) after
having tried to deliver to a CPU but unable to deliver due to MSR[EE]
-- interrupts no longer get reliably delivered in the new kernel. I
tried various ways of f
This driver hangs the kernel on boot when loaded via kexec.
To make this driver kexec-safe, add a suspend or freeze hook, and when
probing, don't make any assumptions about the existing hardware state
(e.g. don't request_irq before quiescing the device).
Signed-off-by: Scott Wood
Cc: Cristian St
85xx currently uses the generic timebase sync mechanism when
CONFIG_KEXEC is enabled, because 32-bit 85xx kexec support does a hard
reset of each core. 64-bit 85xx kexec does not do this, so we neither
need nor want this (nor is the generic timebase sync code built on
ppc64).
FWIW, I don't like t
Use an AS=1 trampoline TLB entry to allow all normal TLB1 entries to
be loaded at once. This avoids the need to keep the translation that
code is executing from in the same TLB entry in the final TLB
configuration as during early boot, which in turn is helpful for
relocatable kernels (e.g. kdump)
This patchset adds support for kexec and kdump to e5500 and e6500 based
systems running 64-bit kernels. It depends on
http://patchwork.ozlabs.org/patch/496952/ ("powerpc/fsl-booke-64: Allow
booting from the secondary thread") and the kexec-tools patch
http://lists.infradead.org/pipermail/kexec/201
It needs to know this because the SMP release mechanism for Freescale
book3e is different from when booting with normal hardware. In theory
we could simulate the normal spin table mechanism, but not (easily) at
the addresses U-Boot put in the device tree -- so there'd need to be
even more communic
Produce a warning-free build on ppc64 (at least, when built as 64-bit
userspace -- if a 64-bit binary for ppc64 is a requirement, why is -m64
set only on purgatory?). Mostly unused (or write-only) variable
warnings, but also one nasty one where reserve() was used without a
prototype, causing long
In CoreNet systems it is not allowed to mix M and non-M mappings to the
same memory, and coherent DMA accesses are considered to be M mappings
for this purpose. Ignoring this has been observed to cause hard
lockups in non-SMP kernels on e6500.
Furthermore, e6500 implements the LRAT (logical to re
map_kernel() doesn't catch all places that create kernel PTEs. In
particular, vmalloc() calls set_pte_at() directly. This causes a
crash when booting a non-SMP kernel on e6500.
Move the sync to __set_pte(), to be executed only for kernel addresses.
Signed-off-by: Scott Wood
---
arch/powerpc/i
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