Re: [PATCH] tty: 8250: Add 64byte UART support for FSL platforms

2014-12-30 Thread Scott Wood
On Tue, 2014-12-30 at 15:08 +0530, Vijay Rai wrote: > Some of FSL SoCs like T1040 has new version of UART controller which > can support 64byte FiFo. > To enable 64 byte support, following needs to be done: > -FCR[EN64] needs to be programmed to 1 to enable it. > -Also, when FCR[EN64]==1, RTL bits

Re: [PATCH] srcu: Isolate srcu sections using CONFIG_SRCU

2014-12-30 Thread Scott Wood
On Mon, 2014-12-29 at 23:32 -0500, Pranith Kumar wrote: > On Mon, Dec 29, 2014 at 5:03 AM, Martin Schwidefsky > wrote: > > On Sat, 27 Dec 2014 12:17:43 -0500 > > Pranith Kumar wrote: > > > >> @@ -65,10 +65,13 @@ > >> #include > >> #include > >> #include > >> -#include > >> #include > >>

Re: [PATCH v2] srcu: Isolate srcu sections using CONFIG_SRCU

2014-12-30 Thread Peter Zijlstra
On Tue, Dec 30, 2014 at 01:54:07PM -0500, Pranith Kumar wrote: > On Tue, Dec 30, 2014 at 1:50 PM, Peter Zijlstra wrote: > > On Tue, Dec 30, 2014 at 12:46:22AM -0500, Pranith Kumar wrote: > >> Isolate the SRCU functions and data structures within CONFIG_SRCU so that > >> there > >> is a compile ti

Re: [PATCH v2] srcu: Isolate srcu sections using CONFIG_SRCU

2014-12-30 Thread Pranith Kumar
On Tue, Dec 30, 2014 at 1:50 PM, Peter Zijlstra wrote: > On Tue, Dec 30, 2014 at 12:46:22AM -0500, Pranith Kumar wrote: >> Isolate the SRCU functions and data structures within CONFIG_SRCU so that >> there >> is a compile time failure if srcu is used when not enabled. This was decided >> to >> b

Re: [PATCH v2] srcu: Isolate srcu sections using CONFIG_SRCU

2014-12-30 Thread Peter Zijlstra
On Tue, Dec 30, 2014 at 12:46:22AM -0500, Pranith Kumar wrote: > Isolate the SRCU functions and data structures within CONFIG_SRCU so that > there > is a compile time failure if srcu is used when not enabled. This was decided > to > be better than waiting until link time for a failure to occur.

Re: [PATCH] ASoC: fsl_esai: Fix incorrect xDC field width of xCCR registers

2014-12-30 Thread Mark Brown
On Mon, Dec 29, 2014 at 04:13:51PM -0800, Nicolin Chen wrote: > The xDC field should have 5 bit width according to Reference Manual. > Thus this patch fixes it. Applied, thanks - I also fixed the patch author up to be him. signature.asc Description: Digital signature

Re: [PATCH] ASoC: fsl_esai: Fix incorrect xDC field width of xCCR registers

2014-12-30 Thread Mark Brown
On Mon, Dec 29, 2014 at 04:13:51PM -0800, Nicolin Chen wrote: > The xDC field should have 5 bit width according to Reference Manual. > Thus this patch fixes it. Applied, thanks. signature.asc Description: Digital signature ___ Linuxppc-dev mailing list

[PATCH] tty: 8250: Add 64byte UART support for FSL platforms

2014-12-30 Thread Vijay Rai
Some of FSL SoCs like T1040 has new version of UART controller which can support 64byte FiFo. To enable 64 byte support, following needs to be done: -FCR[EN64] needs to be programmed to 1 to enable it. -Also, when FCR[EN64]==1, RTL bits to be used as below to define various Receive Trigger Levels:

Re: [PATCH] cleanup on stack DECLARE_COMPLETIONs

2014-12-30 Thread Dimitri Sivanich
On Tue, Dec 23, 2014 at 06:34:08PM +0100, Nicholas Mc Guire wrote: > fixups for incorrect use of DECLARE_COMPLETION. see also commit > 6e9a4738 ("completions: lockdep annotate on stack completions") > The only somewhat special case being > drivers/misc/sgi-gru/grukservices.c:quicktest2 > which had