Re: [RFC PATCH v3 1/3] powerpc: Fix warning reported by verify_cpu_node_mapping()

2014-10-03 Thread Nishanth Aravamudan
On 03.10.2014 [10:50:20 +1000], Michael Ellerman wrote: > On Thu, 2014-10-02 at 14:13 -0700, Nishanth Aravamudan wrote: > > Ben & Michael, > > > > What's the status of these patches? > > Been in my next for a week :) > > https://git.kernel.org/cgit/linux/kernel/git/mpe/linux.git/log/?h=next Ah

Re: Pull request: scottwood/linux.git next

2014-10-03 Thread Stephen Rothwell
Hi Scott, On Fri, 3 Oct 2014 14:52:53 -0500 Scott Wood wrote: > > On Mon, 2014-09-22 at 17:21 -0500, Scott Wood wrote: > > Highlights include DMA32 zone support (SATA, USB, etc now works on 64-bit > > FSL kernels), MSI changes, 8xx optimizations and cleanup, t104x board > > support, and PrPMC PCI

Re: [PATCH v2 1/2] spi: fsl-spi: Fix parameter ram offset setup for CPM1

2014-10-03 Thread Scott Wood
On Fri, 2014-10-03 at 18:49 +0200, Christophe Leroy wrote: > On CPM1, the SPI parameter RAM has a default location. In > fsl_spi_cpm_get_pram() > there was a confusion between the SPI_BASE register and the base of the SPI > parameter RAM. Fortunatly, it was working properly with MPC866 and MPC885

Re: [PATCH 2/2] spi: fsl-spi: Allow dynamic allocation of CPM1 parameter RAM

2014-10-03 Thread Scott Wood
On Fri, 2014-10-03 at 22:15 +0200, christophe leroy wrote: > Le 03/10/2014 16:44, Mark Brown a écrit : > > On Fri, Oct 03, 2014 at 02:56:09PM +0200, Christophe Leroy wrote: > > > >> +config CPM1_RELOCSPI > >> + bool "Dynamic SPI relocation" > >> + default n > >> + help > >> +On recent MPC8xx

Re: [PATCH 2/2] spi: fsl-spi: Allow dynamic allocation of CPM1 parameter RAM

2014-10-03 Thread christophe leroy
Le 03/10/2014 16:44, Mark Brown a écrit : On Fri, Oct 03, 2014 at 02:56:09PM +0200, Christophe Leroy wrote: +config CPM1_RELOCSPI + bool "Dynamic SPI relocation" + default n + help + On recent MPC8xx (at least MPC866 and MPC885) SPI can be relocated + without

Re: Pull request: scottwood/linux.git next

2014-10-03 Thread Scott Wood
On Mon, 2014-09-22 at 17:21 -0500, Scott Wood wrote: > Highlights include DMA32 zone support (SATA, USB, etc now works on 64-bit > FSL kernels), MSI changes, 8xx optimizations and cleanup, t104x board > support, and PrPMC PCI enumeration. > > The following changes since commit 78eb9094ca08a40b8f9d

Re: [PATCH v2 2/2] spi: fsl-spi: Allow dynamic allocation of CPM1 parameter RAM

2014-10-03 Thread Scott Wood
On Fri, 2014-10-03 at 18:49 +0200, Christophe Leroy wrote: > On CPM1, the SPI parameter RAM has a default location. In order to use SPI > while > using SCC2 with features like QMC or Ethernet, it is necessary to relocate SPI > parameter RAM in a free location in the CPM dual port RAM. Please expl

[PATCH v2 2/2] spi: fsl-spi: Allow dynamic allocation of CPM1 parameter RAM

2014-10-03 Thread Christophe Leroy
On CPM1, the SPI parameter RAM has a default location. In order to use SPI while using SCC2 with features like QMC or Ethernet, it is necessary to relocate SPI parameter RAM in a free location in the CPM dual port RAM. With this patch, when "fsl,cpm1-spi-reloc" instead of "fsl,cpm1-spi" compatible

[PATCH v2 1/2] spi: fsl-spi: Fix parameter ram offset setup for CPM1

2014-10-03 Thread Christophe Leroy
On CPM1, the SPI parameter RAM has a default location. In fsl_spi_cpm_get_pram() there was a confusion between the SPI_BASE register and the base of the SPI parameter RAM. Fortunatly, it was working properly with MPC866 and MPC885 because they do set SPI_BASE, but on MPC860 and other old MPC8xx tha

[PATCH v2 0/2] fsl: fsl-spi: Fix CMP1 pram allocation and allow dynamic allocation

2014-10-03 Thread Christophe Leroy
This patchset: 1) Fix parameter ram offset setup for CPM1 2) Allow dynamic allocation of CPM1 parameter RAM Tested on MPC885. Signed-off-by: Christophe Leroy --- Changes from v1 to v2: using OF compatible instead of compile time option drivers/spi/spi-fsl-cpm.c | 12 +++- drivers/sp

Re: [PATCH] ASoC: fsl_spdif: Remove unused includes of linux/clk-private.h

2014-10-03 Thread Mark Brown
On Fri, Oct 03, 2014 at 05:54:13PM +0200, Tomeu Vizoso wrote: > Signed-off-by: Tomeu Vizoso Applied, thanks. signature.asc Description: Digital signature ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/lin

[PATCH] ASoC: fsl_spdif: Remove unused includes of linux/clk-private.h

2014-10-03 Thread Tomeu Vizoso
Signed-off-by: Tomeu Vizoso --- sound/soc/fsl/fsl_spdif.c | 1 - 1 file changed, 1 deletion(-) diff --git a/sound/soc/fsl/fsl_spdif.c b/sound/soc/fsl/fsl_spdif.c index 70acfe4..5bda323 100644 --- a/sound/soc/fsl/fsl_spdif.c +++ b/sound/soc/fsl/fsl_spdif.c @@ -15,7 +15,6 @@ #include #include

Re: [PATCH 2/2] spi: fsl-spi: Allow dynamic allocation of CPM1 parameter RAM

2014-10-03 Thread Mark Brown
On Fri, Oct 03, 2014 at 02:56:09PM +0200, Christophe Leroy wrote: > +config CPM1_RELOCSPI > + bool "Dynamic SPI relocation" > + default n > + help > + On recent MPC8xx (at least MPC866 and MPC885) SPI can be relocated > + without micropatch. This activates relocation to a d

Re: [PATCH v2 3/4] sound/radeon: Move 64-bit MSI quirk from arch to driver

2014-10-03 Thread Alex Deucher
On Fri, Oct 3, 2014 at 1:23 AM, Benjamin Herrenschmidt wrote: > On Wed, 2014-10-01 at 22:13 -0400, Alex Deucher wrote: > >> The attached updated patch only flags the affected asics. > > I need formal (email :-) permission to add your s-o-b (and From: while > at it since you wrote most of it) for t

[PATCH 2/2] spi: fsl-spi: Allow dynamic allocation of CPM1 parameter RAM

2014-10-03 Thread Christophe Leroy
On CPM1, the SPI parameter RAM has a default location. In order to use SPI while using SCC2 with features like QMC or Ethernet, it is necessary to relocate SPI parameter RAM in a free location in the CPM dual port RAM. With this patch, when CONFIG_CPM1_RELOCSPI is set, the parameter RAM for SPI is

[PATCH 1/2] spi: fsl-spi: Fix parameter ram offset setup for CPM1

2014-10-03 Thread Christophe Leroy
On CPM1, the SPI parameter RAM has a default location. In fsl_spi_cpm_get_pram() there was a confusion between the SPI_BASE register and the base of the SPI parameter RAM. Fortunatly, it was working properly with MPC866 and MPC885 because they do set SPI_BASE, but on MPC860 and other old MPC8xx tha

[PATCH 0/2] fsl: fsl-spi: Fix CMP1 pram allocation and allow dynamic allocation

2014-10-03 Thread Christophe Leroy
This patchset: 1) Fix parameter ram offset setup for CPM1 2) Allow dynamic allocation of CPM1 parameter RAM Tested on MPC885. Signed-off-by: Christophe Leroy --- linux/arch/powerpc/platforms/8xx/Kconfig | 11 +++ linux/drivers/spi/spi-fsl-cpm.c | 14 +- 2 files cha

Re: [PATCH] powerpc: fix sys_call_table declaration

2014-10-03 Thread Romeo Cane
On Fri, Oct 03, 2014 at 07:34:34AM +1000, Benjamin Herrenschmidt wrote: > On Thu, 2014-10-02 at 15:41 +0100, Romeo Cane wrote: > > Declaring sys_call_table as a pointer causes the compiler to generate the > > wrong lookup code in arch_syscall_addr > > Care to elaborate ? > > Ben. > > > Signed-o

[PATCH v2] powerpc/vphn: fix endian issue in NUMA device node code

2014-10-03 Thread Greg Kurz
The associativity domain numbers are obtained from the hypervisor through registers and written into memory by the guest: the packed array passed to vphn_unpack_associativity() is then native-endian, unlike what was assumed in the following commit: commit b08a2a12e44eaec5024b2b969f4fcb98169d1ca3 A

Re: [PATCH 1/3] powerpc: Don't build powernv for other platform defconfigs

2014-10-03 Thread Michael Ellerman
On Wed, 2014-09-24 at 16:34 +1000, Stephen Rothwell wrote: > Hi Michael, > > On Wed, 24 Sep 2014 15:57:10 +1000 Michael Ellerman > wrote: > > > > Because powernv arrived after these other platforms, the defconfigs > > didn't have PPC_POWERNV disabled, and being default y it gets turned on. > >

Re: powerpc/book3s: Fix flush_tlb cpu_spec hook to take a generic argument.

2014-10-03 Thread Benjamin Herrenschmidt
On Fri, 2014-10-03 at 17:36 +1000, Michael Ellerman wrote: > It seems that the only detail we are abstracting here is that power7 has 128 > TLB sets and power8 has 512. Is that right? Today ... > It seems like a lot of code to deal with that one detail. > > I guess the other thing it does is cur

Re: [PATCH 3/3] powerpc/kdump: crash_dump.c needs to include io.h

2014-10-03 Thread Michael Ellerman
On Wed, 2014-09-24 at 16:36 +1000, Stephen Rothwell wrote: > Hi Michael, > > On Wed, 24 Sep 2014 15:57:12 +1000 Michael Ellerman > wrote: > > > > For __ioremap(). > > So does that mean that you really want this patch before 2/3 so that you > don't introduce an unnecessary bisection breakage in

Re: powerpc/book3s: Fix flush_tlb cpu_spec hook to take a generic argument.

2014-10-03 Thread Michael Ellerman
On Tue, 2014-23-09 at 03:53:54 UTC, Mahesh Salgaonkar wrote: > From: Mahesh Salgaonkar > > The flush_tlb hook in cpu_spec was introduced as a generic function hook > to invalidate TLBs. But the current implementation of flush_tlb hook > takes IS (invalidation selector) as an argument which is arc

[PATCH] powerpc/powernv: Fix endian bug in LPC bus debugfs accessors

2014-10-03 Thread Benjamin Herrenschmidt
When reading from the LPC, the OPAL FW calls return the value via pointer to a uint32_t which is always returned big endian. Our internal inb/outb implementation byteswaps that fine but our debugfs code is still broken. Signed-off-by: Benjamin Herrenschmidt CC: --- diff --git a/arch/powerpc/pla