On 06/30/2014 11:28 PM, Paul Mackerras wrote:
On Mon, Jun 30, 2014 at 01:35:20PM +0200, Hannes Reinecke wrote:
On 06/30/2014 01:02 PM, Paul Mackerras wrote:
[ .. ]
No, I'm not using LVM, and in fact I deleted all the physical volumes
that were on any of the disks (they were installations of o
> -Original Message-
> From: Wood Scott-B07421
> Sent: Tuesday, July 01, 2014 2:30 AM
> To: Bhushan Bharat-R65777
> Cc: Greg Kroah-Hartman; linuxppc-dev@lists.ozlabs.org; linux-
> ker...@vger.kernel.org
> Subject: Re: [RESEND PATCH] memory: Freescale CoreNet Coherency Fabric error
> repor
Commit 8d6f7c5a: "powerpc/powernv: Make it possible to skip the IRQHAPPENED
check in power7_nap()" added code that prevents cpus from checking for pending
interrupts just before entering sleep state, which is wrong. A cpu cannot enter
any idle state with pending interrupts.
Possible consequences o
On Tue, 2014-07-01 at 10:52 +1000, Michael Ellerman wrote:
> On Mon, 2014-06-30 at 11:54 +0530, Preeti U Murthy wrote:
> > Commit 8d6f7c5a: "powerpc/powernv: Make it possible to skip the IRQHAPPENED
> > check in power7_nap()" added code that prevents even cores which enter sleep
> > on idle, from c
This removes FIXME messages in the function uic_init_one
as this FIXMEs are not valid due to the kernel being better
to panic due to boards without these allocated not being
able to service IRQs.
Signed-off-by: Nicholas Krause
---
arch/powerpc/sysdev/uic.c | 4 ++--
1 file changed, 2 insertions(
This removes FIXME messages in the function uic_init_one
as this FIXMEs are not valid due to the kernel being better
to panic due to boards without these allocated not being
able to service IRQs.
Signed-off-by: Nicholas Krause
---
arch/powerpc/sysdev/uic.c | 4 ++--
1 file changed, 2 insertions(
On 06/30/2014 05:55 PM, Stephen Rothwell wrote:
Hi Guenter,
On Mon, 30 Jun 2014 11:45:30 -0700 Guenter Roeck wrote:
powerpc:allmodconfig has been failing for some time with the following
error.
arch/powerpc/kernel/exceptions-64s.S: Assembler messages:
arch/powerpc/kernel/exceptions-64s.S:131
(2014/06/30 20:36), Michael Ellerman wrote:
> On Mon, 2014-06-30 at 12:14 +0900, Masami Hiramatsu wrote:
>> Ping? :)
>
> Yeah sorry. I started looking at this and got dragged into another mess.
>
> You seem to have duplicated the functionality of arch_deref_entry_point(),
> which was also added f
deal with a compile warning: comparison between
'enum qe_fltr_largest_external_tbl_lookup_key_size'
and 'enum qe_fltr_tbl_lookup_key_size'
the code:
"if (ug_info->largestexternallookupkeysize ==
QE_FLTR_TABLE_LOOKUP_KEY_SIZE_8_BYTES)"
is warned because different enum, so modif
Hi Guenter,
On Mon, 30 Jun 2014 11:45:30 -0700 Guenter Roeck wrote:
>
> powerpc:allmodconfig has been failing for some time with the following
> error.
>
> arch/powerpc/kernel/exceptions-64s.S: Assembler messages:
> arch/powerpc/kernel/exceptions-64s.S:1312: Error: attempt to move .org
> backwa
On Mon, 2014-06-30 at 11:54 +0530, Preeti U Murthy wrote:
> Commit 8d6f7c5a: "powerpc/powernv: Make it possible to skip the IRQHAPPENED
> check in power7_nap()" added code that prevents even cores which enter sleep
> on idle, from checking for pending interrupts. Fix this.
To be clear, it is a bug
On Tue, 2014-06-24 at 16:18 +0800, Zhao Qiang wrote:
> deal with a compile warning: comparison between
> 'enum qe_fltr_largest_external_tbl_lookup_key_size'
> and 'enum qe_fltr_tbl_lookup_key_size'
>
> the code:
> "if (ug_info->largestexternallookupkeysize ==
>QE_FLTR_TABLE_LOOKU
The core mm code will provide a default gate area based on
FIXADDR_USER_START and FIXADDR_USER_END if
!defined(__HAVE_ARCH_GATE_AREA) && defined(AT_SYSINFO_EHDR).
This default is only useful for ia64. arm64, ppc, s390, sh, tile,
64-bit UML, and x86_32 have their own code just to disable it. arm,
On Mon, Jun 30, 2014 at 12:52:29PM +0200, Hannes Reinecke wrote:
> On 06/30/2014 12:30 PM, Paul Mackerras wrote:
> >I have a machine on which 3.15 usually fails to boot, and 3.14 boots
> >every time. The machine is a POWER8 2-socket server with 20 cores
> >(thus 160 CPUs), 128GB of RAM, and 7 SCSI
On Mon, Jun 30, 2014 at 01:35:20PM +0200, Hannes Reinecke wrote:
> On 06/30/2014 01:02 PM, Paul Mackerras wrote:
> >On Mon, Jun 30, 2014 at 12:52:29PM +0200, Hannes Reinecke wrote:
> >>On 06/30/2014 12:30 PM, Paul Mackerras wrote:
> >>>I have a machine on which 3.15 usually fails to boot, and 3.14
On Sun, 2014-06-29 at 23:58 -0500, Bhushan Bharat-R65777 wrote:
>
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Wednesday, June 04, 2014 10:38 PM
> > To: Bhushan Bharat-R65777
> > Cc: Greg Kroah-Hartman; linuxppc-dev@lists.ozlabs.org; linux-
> > ker...@vger.kernel.org
> > Su
powerpc:allmodconfig has been failing for some time with the following
error.
arch/powerpc/kernel/exceptions-64s.S: Assembler messages:
arch/powerpc/kernel/exceptions-64s.S:1312: Error: attempt to move .org backwards
make[1]: *** [arch/powerpc/kernel/head_64.o] Error 1
A number of attempts to fix
On Mon, 2014-06-30 at 15:55 +0300, Mihai Caraman wrote:
> For FSL e6500 core the kernel uses power management SPR register (PWRMGTCR0)
> to enable idle power down for cores and devices by setting up the idle count
> period at boot time. With the host already controlling the power management
> confi
On Mon, 2014-06-30 at 15:54 +0300, Mihai Caraman wrote:
> Tlb search operation used for victim hint relies on the default tlb set by the
> host. When hardware tablewalk support is enabled in the host, the default tlb
> is
> TLB1 which leads KVM to evict the bolted entry. Set and restore the defaul
Add KVM Book3E AltiVec support. KVM Book3E FPU support gracefully reuse host
infrastructure so follow the same approach for AltiVec.
Signed-off-by: Mihai Caraman
---
v2:
- integrate Paul's FP/VMX/VSX changes
arch/powerpc/kvm/booke.c | 67 ++--
1 file
Now that AltiVec support is in place enable e6500 core.
Signed-off-by: Mihai Caraman
---
v2:
- no changes
arch/powerpc/kvm/e500mc.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/powerpc/kvm/e500mc.c b/arch/powerpc/kvm/e500mc.c
index c60b653..0bc9684 100644
--- a/arch/pow
Add ONE_REG support for AltiVec on Book3E.
Signed-off-by: Mihai Caraman
---
v2:
- add comment describing VCSR register representation in KVM vs kernel
arch/powerpc/include/uapi/asm/kvm.h | 5 +
arch/powerpc/kvm/booke.c| 34 ++
2 files changed, 3
Increase FPU laziness by calling kvmppc_load_guest_fp() just before
returning to guest instead of each sched in. Without this improvement
an interrupt may also claim floting point corrupting guest state.
Signed-off-by: Mihai Caraman
---
v2:
- remove fpu_active
- add descriptive comments
arch/
Use common BOOKE_IRQPRIO and BOOKE_INTERRUPT defines for SPE/FP/AltiVec
which share the same interrupt numbers.
Signed-off-by: Mihai Caraman
---
v2:
- remove outdated definitions
arch/powerpc/include/asm/kvm_asm.h| 8
arch/powerpc/kvm/booke.c | 17 +
SPE/FP/AltiVec interrupts share the same numbers. Refactor SPE/FP exit handling
to accommodate AltiVec later on the same flow. Add kvmppc_supports_spe() to
detect
suport for the unit at runtime since it can be configured in the kernel but not
featured on hardware and vice versa.
Signed-off-by: Mi
Add KVM Book3E AltiVec support and enable e6500 core.
Integrates Paul's FP/VMX/VSX changes that landed in kvm-ppc-queue in January
and take into account feedback.
Mihai Caraman (6):
KVM: PPC: Book3E: Use common defines for SPE/FP/AltiVec int numbers
KVM: PPC: Book3E: Refactor SPE/FP exit hand
On Mon, 2014-06-30 at 11:54 +0530, Preeti U Murthy wrote:
> Commit 8d6f7c5a: "powerpc/powernv: Make it possible to skip the IRQHAPPENED
> check in power7_nap()" added code that prevents even cores which enter sleep
> on idle, from checking for pending interrupts. Fix this.
>
> Signed-off-by: Preet
For FSL e6500 core the kernel uses power management SPR register (PWRMGTCR0)
to enable idle power down for cores and devices by setting up the idle count
period at boot time. With the host already controlling the power management
configuration the guest could simply benefit from it, so emulate gues
Tlb search operation used for victim hint relies on the default tlb set by the
host. When hardware tablewalk support is enabled in the host, the default tlb is
TLB1 which leads KVM to evict the bolted entry. Set and restore the default tlb
when searching for victim hint.
Signed-off-by: Mihai Caram
On Mon, Jun 30, 2014 at 12:02 AM, Nicholas Krause wrote:
> This patch fixes the FIXME messages for returning a ENOMEM error
> if uic is not allocated and if uic->irqhost is not allocated a
> IRQ domain that is linear returns EIO.
>
> Signed-off-by: Nicholas Krause
NAK.
You didn't actually fix a
On Mon, 2014-06-30 at 12:14 +0900, Masami Hiramatsu wrote:
> Ping? :)
Yeah sorry. I started looking at this and got dragged into another mess.
You seem to have duplicated the functionality of arch_deref_entry_point(),
which was also added for kprobes, and for the same reason - ie. because some
ar
On 06/30/2014 01:02 PM, Paul Mackerras wrote:
On Mon, Jun 30, 2014 at 12:52:29PM +0200, Hannes Reinecke wrote:
On 06/30/2014 12:30 PM, Paul Mackerras wrote:
I have a machine on which 3.15 usually fails to boot, and 3.14 boots
every time. The machine is a POWER8 2-socket server with 20 cores
(t
On 06/30/2014 12:30 PM, Paul Mackerras wrote:
I have a machine on which 3.15 usually fails to boot, and 3.14 boots
every time. The machine is a POWER8 2-socket server with 20 cores
(thus 160 CPUs), 128GB of RAM, and 7 SCSI disks connected via a
hardware-RAID-capable adapter which appears as two
On Mon, Jun 30, 2014 at 12:52:29PM +0200, Hannes Reinecke wrote:
> On 06/30/2014 12:30 PM, Paul Mackerras wrote:
> >I have a machine on which 3.15 usually fails to boot, and 3.14 boots
> >every time. The machine is a POWER8 2-socket server with 20 cores
> >(thus 160 CPUs), 128GB of RAM, and 7 SCSI
I have a machine on which 3.15 usually fails to boot, and 3.14 boots
every time. The machine is a POWER8 2-socket server with 20 cores
(thus 160 CPUs), 128GB of RAM, and 7 SCSI disks connected via a
hardware-RAID-capable adapter which appears as two IPR controllers
which are both connected to each
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