On Mon, 2014-05-05 at 12:09 +1000, Gavin Shan wrote:
> Commit 7f52a526f ("powerpc/eeh: Allow to disable EEH") caused
> following build error with "celleb_defconfig" as being catched
> by Mikey on linux-next.
>
> arch/powerpc/kernel/eeh.c: In function 'eeh_init_proc':
> arch/powerpc/kernel/eeh.c:11
On Sun, 2014-05-04 at 18:02 +0200, Christian Zigotzky wrote:
> Hi All,
>
> The RC 1, 2, and 3 of the kernel 3.15 don't boot on my PA6T board with a
> Radeon HD 6870 graphics card.
>
> Screenshot:
> http://forum.hyperion-entertainment.biz/download/file.php?id=1060&mode=view
>
> The kernel 3.14
Commit 32e45ff43eaf5c17f changed the default value of
RECLAIM_DISTANCE to 30. However the comment around arch
specifc definition of RECLAIM_DISTANCE is not updated to
reflect the same. Correct the value mentioned in the comment.
Signed-off-by: Preeti U Murthy
Cc: Anton Blanchard
Cc: Benjamin Her
This patch make sure we inherit the LE bit correctly in different case
so that we can run Little Endian distro in PR mode
Signed-off-by: Aneesh Kumar K.V
---
Changes from V4:
* Don't check for MSR_LE bit while setting LPCR.
arch/powerpc/include/asm/kvm_host.h | 2 +-
arch/powerpc/kernel/asm-o
Commit 7f52a526f ("powerpc/eeh: Allow to disable EEH") caused
following build error with "celleb_defconfig" as being catched
by Mikey on linux-next.
arch/powerpc/kernel/eeh.c: In function 'eeh_init_proc':
arch/powerpc/kernel/eeh.c:1173:37: error: 'powerpc_debugfs_root' \
undeclared (first use in t
The patch introduces the infrastructure of error injection backend
for PowerNV platform. For now, we just implement logic to inject
PCI errors. We need support injecting other types of errors in
future.
Signed-off-by: Gavin Shan
---
arch/powerpc/include/asm/book3s_errinjct.h | 19 +++
arch/powe
The patch introduces kernel configuration option KVM_ERRINJCT. It
enables emulating error injection RTAS services used on IBM POWER
(pSeries) servers.
Signed-off-by: Gavin Shan
---
arch/powerpc/kvm/Kconfig | 8
1 file changed, 8 insertions(+)
diff --git a/arch/powerpc/kvm/Kconfig b/arc
The patch synchronizes OPAL header file with firmware so that the
host kernel can make OPAL call to do error injection.
Signed-off-by: Gavin Shan
---
arch/powerpc/include/asm/opal.h| 65 ++
arch/powerpc/platforms/powernv/opal-wrappers.S | 1 +
2 files cha
The patch intends to implements the infrastructure for error injection.
RTAS calls "ibm,{open-errinjct, close-errinjct, errinjct}" are handled
in the host directly. Each VM is allowed to have one opened token at
once.
There're multiple types of error injection to be supported by the system.
So we
The patch intends to connect the KVM module with the backend for
EEH RTAS emulation. In turn, we can handle the EEH RTAS services
from the guest.
Signed-off-by: Gavin Shan
---
arch/powerpc/include/asm/kvm_ppc.h | 7 +++
arch/powerpc/kvm/book3s_rtas.c | 40 +++
If we detects frozen state on PE that has been passed to guest, we
needn't handle it. Instead, we rely on the guest to detect and recover
it. The patch avoid EEH event on the frozen passed PE so that the guest
can have chance to handle that.
Signed-off-by: Gavin Shan
---
arch/powerpc/kernel/eeh.
The RTAS call "ibm,get-config-addr-info2" is being used by guest
to retrieve the corresponding PE number for the specified PCI device.
The patch implements the backend to support the emulation of the
RTAS call.
Signed-off-by: Gavin Shan
---
arch/powerpc/platforms/powernv/eeh-rtas.c | 59
The RTAS call "ibm,configure-pe" is being used to restore everything
after PE reset. The patch implements the backend to emulate the
RTAS call. In that, we restores BARs for the affected PCI device in
host side because the guest might not have full access to the config
space.
Signed-off-by: Gavin
The RTAS call "ibm,read-slot-reset-state2" is being used to retrieve
the various states of the specified PE, e.g. reset state, frozen DMA,
frozen MMIO etc. The patch implements the backend to emulate the
RTAS call.
Signed-off-by: Gavin Shan
---
arch/powerpc/platforms/powernv/eeh-rtas.c | 77
The RTAS call "ibm,slot-error-detail" is being used to retrieve the
error log (either permanent or temporary) from the underlying firmware.
The patch implements the backend to emulate the RTAS call.
Signed-off-by: Gavin Shan
---
arch/powerpc/platforms/powernv/eeh-rtas.c | 75
The RTAS call "ibm,set-eeh-option" is being used to enable/disable
EEH functionality on the specified PE, or enable MMIO/DMA for the
frozen PE. The patch emulates the RTAS call.
Signed-off-by: Gavin Shan
---
arch/powerpc/platforms/powernv/eeh-rtas.c | 83 +++
1 file c
The RTAS call "ibm,set-slot-reset" is being used to reset one
particular PE, either foundamental or hot reset. The patche intends
to implement the backend to emulate the RTAS call.
Signed-off-by: Gavin Shan
---
arch/powerpc/platforms/powernv/eeh-rtas.c | 92 +++
1 fil
The guest will pass 2 kinds of addresses: tranditional bus/device/
function combo, and guest sensitive PE address returned from host.
The patch introduces function kvmppc_eeh_format_addr() to convert
the guest address information from RTAS call argument (struct rtas_args)
and retrieve the EEH devic
The implementation of EEH RTAS emulation is split up into 2 layers:
kvm and powernv platform layer. The KVM layer is quite simple to
dispatch RTAS requests from guest to powernv platform layer. After
that, the powernv platform layer takes care of the details, process
the request and return result t
The patch introduces function kvm_vfio_eeh_dev_unmap(), which is
expected to be called on IOCTL command issued to the VM device, in
order to tear down the address mapping for VFIO PCI device.
Signed-off-by: Gavin Shan
---
arch/powerpc/kernel/eeh_pe.c | 82
The address (domain/bus/slot/function) looks different from the
perspective of host and guest. We have to setup the mapping for
EEH and tear it down accordingly. The patch introduces additional
attributes to KVM VFIO device for address mapping or unmapping.
Signed-off-by: Gavin Shan
---
arch/pow
The patch introduces function eeh_vfio_dev_get() to search the EEH
device according to its guest address, which is made up of VM indicator,
PHB BUID, bus, slot and function number. The function is useful in the
backends for EEH RTAS emulation.
Signed-off-by: Gavin Shan
---
arch/powerpc/include/a
The patch introduces function eeh_vfio_pe_get() to search the EEH
PE according to its guest address, which is made up of KVM indicator,
PHB ID and PE configuration address. The function will be useful in
backends for EEH RTAS emulation.
Signed-off-by: Gavin Shan
---
arch/powerpc/include/asm/eeh.
The patch introduces function kvm_vfio_eeh_dev_map(), which is
expected to be called on IOCTL command issued to the VM device, in
order to build the address mapping for VFIO PCI device.
Signed-off-by: Gavin Shan
---
arch/powerpc/kernel/eeh_pe.c | 88
When the VM is destroyed, the EEH devices and PEs that have been
marked as being owned by guest should be returned to host. The
patch introduces kvmppc_vfio_pci_free() to do it.
Signed-off-by: Gavin Shan
---
arch/powerpc/include/asm/eeh.h | 6 +-
arch/powerpc/kernel/eeh_pe.c | 42
The address of passed PCI devices (domain:bus:slot:func) might be
quite different from the perspective of host and guest. We have to
trace the address mapping so that we can emulate EEH RTAS requests
from guest. The patch introduces additional fields to eeh_pe and
eeh_dev for the purpose.
Signed-o
The patch introduces kernel configuration option KVM_EEH, which
depends on KVM_BOOK3S_64, VFIO_IOMMU_SPAPR_TCE and EEH. The option
is to enable emulating EEH RTAS services that required by EEH
module in pSeries-based guest.
Signed-off-by: Gavin Shan
---
arch/powerpc/kvm/Kconfig | 8
1 f
The series of patches intends to support EEH for PCI devices, which have been
passed through to PowerKVM based guest via VFIO. The implementation is
straightforward based on the issues or problems we have to resolve to support
EEH for PowerKVM based guest.
- Emulation for EEH RTAS requests. Thanks
On Sun, May 04, 2014 at 10:48:52PM +0530, Aneesh Kumar K.V wrote:
> This patch make sure we inherit the LE bit correctly in different case
> so that we can run Little Endian distro in PR mode
[snip]
> +static void kvmppc_set_lpcr_pr(struct kvm_vcpu *vcpu, u64 new_lpcr)
> +{
> + /*
> + *
Since commit cb523e09 ("powerpc/eeh: Avoid I/O access during PE
reset"), the PE is kept as frozen state on hardware level until
the PE reset is done completely. After that, we explicitly clear
the frozen state of the affected PE. However, there might have
frozen child PEs of the affected PE and we
When we have the corner case of frozen parent and child PE at the
same time, we have to handle the frozen parent PE prior to the
child. Without clearning the frozen state on parent PE, the child
PE can't be recovered successfully.
The patch searches the EEH PE hierarchy tree and returns the toppes
Commit cb5b242c ("powerpc/eeh: Escalate error on non-existing PE")
escalates the frozen state on non-existing PE to fenced PHB. It
was to improve kdump reliability. After that, commit 361f2a2a
("powrpc/powernv: Reset PHB in kdump kernel") was introduced to
issue complete reset on all PHBs to increa
"Aneesh Kumar K.V" writes:
> Signed-off-by: Aneesh Kumar K.V
> ---
> arch/powerpc/include/asm/kvm_book3s_64.h | 146
> ++-
> arch/powerpc/kvm/book3s_hv.c | 7 ++
> 2 files changed, 130 insertions(+), 23 deletions(-)
>
> diff --git a/arch/powerpc/includ
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/kvm_book3s_64.h | 146 ++-
arch/powerpc/kvm/book3s_hv.c | 7 ++
2 files changed, 130 insertions(+), 23 deletions(-)
diff --git a/arch/powerpc/include/asm/kvm_book3s_64.h
b/arch/powerpc/include
With debug option "sleep inside atomic section checking" enabled we get
the below WARN_ON during a PR KVM boot. This is because upstream now
have PREEMPT_COUNT enabled even if we have preempt disabled. Fix the
warning by adding preempt_disable/enable around floating point and altivec
enable.
WARNI
We reserve 5% of total ram for CMA allocation and not using that can
result in us running out of numa node memory with specific
configuration. One caveat is we may not have node local hpt with pinned
vcpu configuration. But currently libvirt also pins the vcpu to cpuset
after creating hash page tab
Although it's optional IBM POWER cpus always had DAR value set on
alignment interrupt. So don't try to compute these values.
Signed-off-by: Aneesh Kumar K.V
---
Changes from V3:
* Use make_dsisr instead of checking feature flag to decide whether to use
saved dsisr or not
arch/powerpc/include/
This patch make sure we inherit the LE bit correctly in different case
so that we can run Little Endian distro in PR mode
Signed-off-by: Aneesh Kumar K.V
---
Changes from V3:
* Address review comments.
* rebase to new kernel so that intr_msr is moved instead of adding a new
variable
* Drop t
Hi All,
The RC 1, 2, and 3 of the kernel 3.15 don't boot on my PA6T board with a
Radeon HD 6870 graphics card.
Screenshot:
http://forum.hyperion-entertainment.biz/download/file.php?id=1060&mode=view
The kernel 3.14 starts without any problems. Has anyone a tip for me,
please?
Cheers,
Ch
Hello Scott,
On 04/21/2014 05:14 PM, Scott Wood wrote:
> On Fri, 2014-04-18 at 07:21 -0500, Shruti Kanetkar wrote:
>> FMan 1 Gb/s MACs (dTSEC and mEMAC) have support for SGMII PHYs.
>> Add support for the internal SerDes TBI PHYs
>>
>> Based on prior work by Andy Fleming
>>
>> Signed-off-by: Shr
On 05/03/2014 12:46 AM, Vinod Koul wrote:
On Fri, Apr 18, 2014 at 04:17:51PM +0800, hongbo.zh...@freescale.com wrote:
From: Hongbo Zhang
This patch adds suspend resume functions for Freescale DMA driver.
.prepare callback is used to stop further descriptors from being added into the
pending q
On 05/03/2014 12:51 AM, Vinod Koul wrote:
On Fri, Apr 18, 2014 at 04:17:50PM +0800, hongbo.zh...@freescale.com wrote:
From: Hongbo Zhang
The usage of spin_lock_irqsave() is a stronger locking mechanism than is
required throughout the driver. The minimum locking required should be used
instead
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