On Wed, 2014-04-02 at 10:34 +1100, Benjamin Herrenschmidt wrote:
> Hi Linus !
>
> This time around, the powerpc merges are going to be a little bit
> more complicated than usual.
Looks like I sent this one twice, one with "merge" and one with "next"
in the subject. They are otherwise identical (i
On Tuesday 25 March 2014 11:20 PM, Dave Hansen wrote:
> On 03/25/2014 10:36 AM, Kirill A. Shutemov wrote:
+/*
+ * Fault around order is a control knob to decide the fault around pages.
+ * Default value is set to 0UL (disabled), but the arch can override it as
+ * desired.
On Wed, 2014-04-02 at 00:03 +0200, Rafael J. Wysocki wrote:
> > Rafael, are you going to take these or should I send them to Linus ?
> >
> > (I'd rather you take them :-)
>
> I can do that, but the timing is pretty bad. How urgent are they?
To be honest pretty urgent. It's a new drop-in driver
On 04/02/2014 06:13 AM, Michael Neuling wrote:
> Anshuman Khandual wrote:
>> > This patch adds few more ptrace request macros expanding
>> > the existing capability. These ptrace requests macros can
>> > be classified into two categories.
> Why is this only an RFC?
>
Looking for comments, sugges
During the testing, we encounter below WARN followed by Oops:
WARNING: at kernel/sched/core.c:6218
...
NIP [c0101660] .build_sched_domains+0x11d0/0x1200
LR [c0101358] .build_sched_domains+0xec8/0x1200
PACATMSCRATCH [8000f032]
On Tue, Apr 01, 2014 at 05:42:54PM +0100, Mark Brown wrote:
> On Tue, Apr 01, 2014 at 09:21:57PM +0800, Nicolin Chen wrote:
>
> > Sir, I just rebased my for-next branch again and found that it's missing
> > two applied patches: "ASoC: fsl_sai: Add isr to deal with error flag" and
> > "ASoC: fsl_sa
Anshuman Khandual wrote:
> This patch adds few more ptrace request macros expanding
> the existing capability. These ptrace requests macros can
> be classified into two categories.
Why is this only an RFC?
Also, please share the test case that you wrote for this.
Mikey
>
> (1) Transactional
> > Thanks, This has been fixed in the update version, please help to
> review it at:
> > http://patchwork.ozlabs.org/patch/335225/
> > I forgot to add the V2 information in the subject in the update patch
> so this may confuse the reviewer, sorry for that.
>
> It is not fixed in that patch (or d
Hi Linus !
This is the branch I mentioned in my other pull request which contains
our improved cpuidle support for the "powernv" platform
(non-virtualized). It adds support for the "fast sleep" feature of the
processor which provides higher power savings than our usual "nap" mode
but at the cost o
Hi Linus !
This time around, the powerpc merges are going to be a little bit
more complicated than usual.
This is the main pull request with most of the work for this merge
window. I will describe it a bit more further down.
There is some additional cpuidle driver work, however I haven't include
Hi Linus !
This time around, the powerpc merges are going to be a little bit
more complicated than usual.
This is the main pull request with most of the work for this merge
window. I will describe it a bit more further down.
There is some additional cpuidle driver work, however I haven't include
On Mon, 2014-03-03 at 17:50 +0800, Shengzhou Liu wrote:
> + dcsr: dcsr@f {
> + ranges = <0x 0xf 0x 0x01072000>;
> + };
This is a very odd size -- where did it come from?
-Scott
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On Tuesday, April 01, 2014 08:46:49 PM Benjamin Herrenschmidt wrote:
> On Tue, 2014-04-01 at 12:43 +0530, Gautham R. Shenoy wrote:
> > From: "Gautham R. Shenoy"
> >
> > Enable CPUFreq for PowerNV. Select "performance", "powersave",
> > "userspace" and "ondemand" governors. Choose "ondemand" to be
On Mon, 2014-03-03 at 17:50 +0800, Shengzhou Liu wrote:
> + corenet-cf@18000 {
> + compatible = "fsl,corenet-cf";
> + reg = <0x18000 0x1000>;
> + interrupts = <16 2 1 31>;
> + fsl,ccf-num-csdids = <32>;
> + fsl,ccf-num-snoopids = <32>;
On Tue, 2014-04-01 at 02:28 -0500, Jin Zhengxiong-R64188 wrote:
> > > + if (!diu_ops.set_pixel_clock) {
> > > + data->pixelclk_reg = of_iomap(np, 1);
> > > + if (!data->pixelclk_reg) {
> > > + dev_err(&pdev->dev, "Cannot map pixelclk registers,
> > please \
> > > +
On 04/01/2014 06:58 PM, Scott Wood wrote:
On Tue, 2014-04-01 at 07:47 +0200, Alexander Graf wrote:
Am 01.04.2014 um 01:03 schrieb Scott Wood :
On Mon, 2014-03-31 at 15:41 +0200, Alexander Graf wrote:
On 03/26/2014 10:17 PM, Scott Wood wrote:
On Thu, 2014-02-20 at 18:30 +0200, Mihai Caraman w
On Tue, 2014-04-01 at 07:47 +0200, Alexander Graf wrote:
>
> > Am 01.04.2014 um 01:03 schrieb Scott Wood :
> >
> >> On Mon, 2014-03-31 at 15:41 +0200, Alexander Graf wrote:
> >>> On 03/26/2014 10:17 PM, Scott Wood wrote:
> On Thu, 2014-02-20 at 18:30 +0200, Mihai Caraman wrote:
> +/
On Tue, Apr 01, 2014 at 09:21:57PM +0800, Nicolin Chen wrote:
> Sir, I just rebased my for-next branch again and found that it's missing
> two applied patches: "ASoC: fsl_sai: Add isr to deal with error flag" and
> "ASoC: fsl_sai: Improve fsl_sai_isr()", so that's why this PATCH-2 could
> not be a
Anton Blanchard wrote:
diff --git a/arch/powerpc/lib/memcpy_64.S b/arch/powerpc/lib/memcpy_64.S
index 72ad055..01da956 100644
--- a/arch/powerpc/lib/memcpy_64.S
+++ b/arch/powerpc/lib/memcpy_64.S
@@ -12,7 +12,7 @@
.align 7
_GLOBAL(memcpy)
BEGIN_FTR_SECTION
- std r3,48(r1)
When we never get around to seeing an HEA ethernet adapter, there's
no point in restricting ourselves to 4k IO page size.
This speeds up IO maps when CONFIG_IBMEBUS is disabled.
Signed-off-by: Alexander Graf
---
arch/powerpc/mm/hash_utils_64.c | 21 ++---
1 file changed, 18 inse
On Tue, Apr 01, 2014 at 01:07:15PM +0100, Mark Brown wrote:
> On Tue, Apr 01, 2014 at 11:17:07AM +0800, Nicolin Chen wrote:
> > We only enable one side interrupt for each stream since over/underrun
> > on the opposite stream would be resulted from what we previously did,
> > enabling TERE but remai
On Tue, Apr 01, 2014 at 11:17:07AM +0800, Nicolin Chen wrote:
> We only enable one side interrupt for each stream since over/underrun
> on the opposite stream would be resulted from what we previously did,
> enabling TERE but remaining FRDE disabled, even though the xrun on the
> opposite direction
On Tue, Apr 01, 2014 at 11:17:06AM +0800, Nicolin Chen wrote:
> The current trigger() has two crucial problems:
> 1) The DMA request enabling operations (FSL_SAI_CSR_FRDE) for Tx and Rx are
>now totally exclusive: It would fail to run simultaneous Tx-Rx cases.
> 2) The TERE disabling operation
Since we added ipg clock to the DT binding, we should update the current
SAI dts/dtsi so as not to break their functions.
Signed-off-by: Nicolin Chen
---
arch/arm/boot/dts/vf610.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/vf610.dtsi b/arch/arm/b
This series of patches add ipg clock control to fsl_sai driver and updates
the vf610.dtsi accordingly.
@Shawn
I'm not sure if VF610 currently does full works with SAI audio function.
The PATCH-2 is based on broonie/for-next.
Nicolin Chen (2):
ASoC: fsl_sai: Add clock control for SAI
ARM: dts:
The SAI mainly has two clocks:
ipg_clock -- registers access for SoC or DMA to read and write.
sai_clock -- providing DAI format bit clock and frame clock.
Thus this patch adds these two clocks to the driver with their clock
controls and replaces the regmap clock 'sai_clock' with 'ipg_clock'.
Sig
The next coming i.MX6 Solo X SoC also contains SAI module while we use
imp_pcm_init() for i.MX platform.
So this patch adds one compatible route for imx6sx and updates the DT
doc accordingly.
Signed-off-by: Nicolin Chen
---
Documentation/devicetree/bindings/sound/fsl-sai.txt | 2 +-
sound/soc/
This patch adds few more ptrace request macros expanding
the existing capability. These ptrace requests macros can
be classified into two categories.
(1) Transactional memory
/* TM special purpose registers */
PTRACE_GETTM_SPRREGS
PTRACE_SETTM_SPRREGS
/* Checkpoin
On Tue, Apr 01, 2014 at 12:04:12PM +0100, Mark Brown wrote:
> On Tue, Apr 01, 2014 at 11:17:05AM +0800, Nicolin Chen wrote:
>
> > * The patches are generated by using '-U2' because the default '-U3'
> > would conflict the baseline without fsl_sai_isr patches.
>
> What are these "fsi_sai_isr pat
On Tue, Apr 01, 2014 at 11:17:05AM +0800, Nicolin Chen wrote:
> * The patches are generated by using '-U2' because the default '-U3'
> would conflict the baseline without fsl_sai_isr patches.
What are these "fsi_sai_isr patches"?
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Description: Digital signature
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On Mon, Mar 31, 2014 at 5:02 PM, Nathan Fontenot
wrote:
> struct rtas_error_log {
> - unsigned long version:8;/* Architectural version */
> - unsigned long severity:3; /* Severity level of error */
> - unsigned long disposition:2;/* Degr
On Tue, 2014-04-01 at 12:43 +0530, Gautham R. Shenoy wrote:
> From: "Gautham R. Shenoy"
>
> Enable CPUFreq for PowerNV. Select "performance", "powersave",
> "userspace" and "ondemand" governors. Choose "ondemand" to be the
> default governor.
Rafael, are you going to take these or should I send
add optional property devicetree for SPI slave nodes
into devicetree so that LSB mode can be enabled by devicetree.
Signed-off-by: Zhao Qiang
---
changs for v2:
- remove duplicate "spi-rx-bus-width"
Documentation/devicetree/bindings/spi/spi-bus.txt | 2 ++
drivers/spi/spi.c
Hi Zhao Qiang,
On Tue, Apr 01, 2014 at 03:55:31PM +0800, Zhao Qiang wrote:
> add optional property devicetree for SPI slave nodes
> into devicetree so that LSB mode can be enabled by devicetree.
>
> Signed-off-by: Zhao Qiang
> ---
> Documentation/devicetree/bindings/spi/spi-bus.txt | 4
>
From: Wang Dongsheng
Add cpuidle support for e500 family, using cpuidle framework to
manage various low power modes. The new implementation will remain
compatible with original idle method.
I have done test about power consumption and latency. Cpuidle framework
will make CPU response time faster
On Tue, Apr 1, 2014 at 9:57 AM, Geert Uytterhoeven wrote:
> JFYI, when comparing v3.14[1] to v3.14-rc8[3], the summaries are:
> - build errors: +2/-10
+ error: No rule to make target include/config/auto.conf: => N/A
powerpc-randconfig
+ error: initramfs.c: undefined reference to `__stac
add optional property devicetree for SPI slave nodes
into devicetree so that LSB mode can be enabled by devicetree.
Signed-off-by: Zhao Qiang
---
Documentation/devicetree/bindings/spi/spi-bus.txt | 4
drivers/spi/spi.c | 2 ++
2 files changed, 6 insertions(+)
Unify the low/highmem code path from do_init_bootmem() by using (the)
lowmem related variables/parameters even when the low/highmem split
is not needed (64-bit) or configured. In such cases the "lowmem"
variables/parameters continue to observe the definition by referring
to memory directly mapped b
Currently bootmem is just a wrapper around memblock. This gets rid of
the wrapper code just as other ARHC(es) did: x86, arm, etc.
Signed-off-by: Emil Medve
---
arch/powerpc/Kconfig | 3 +++
arch/powerpc/mm/mem.c | 8
2 files changed, 11 insertions(+)
diff --git a/arch/powerpc/Kconfig
> > + if (!diu_ops.set_pixel_clock) {
> > + data->pixelclk_reg = of_iomap(np, 1);
> > + if (!data->pixelclk_reg) {
> > + dev_err(&pdev->dev, "Cannot map pixelclk registers,
> please \
> > + provide the diu_ops for pixclk setting
> in
From: "Gautham R. Shenoy"
Enable CPUFreq for PowerNV. Select "performance", "powersave",
"userspace" and "ondemand" governors. Choose "ondemand" to be the
default governor.
Signed-off-by: Gautham R. Shenoy
Signed-off-by: Srivatsa S. Bhat
---
arch/powerpc/configs/pseries_defconfig| 1 +
ar
From: "Gautham R. Shenoy"
The .driver_data field in the cpufreq_frequency_table was supposed to
be private to the drivers. However at some later point, it was being
used to indicate if the particular frequency in the table is the
BOOST_FREQUENCY. After patches [1] and [2], the .driver_data is onc
From: Vaidyanathan Srinivasan
Backend driver to dynamically set voltage and frequency on
IBM POWER non-virtualized platforms. Power management SPRs
are used to set the required PState.
This driver works in conjunction with cpufreq governors
like 'ondemand' to provide a demand based frequency an
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