Hi Alex,
> The ibmveth driver is memcpy()'ing the mac address between a variable
> (register) and memory. This assumes a certain endianness of the
> system, so let's make that implicit assumption work again.
Nice catch! I don't like how the driver has two different methods
for creating these MAC
Use the recently added and possibly more efficient
ether_addr_equal_unaligned to instead of memcmp.
Cc: Li Yang
Cc: net...@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org
Cc: linux-ker...@vger.kernel.org
Signed-off-by: Ding Tianhong
---
drivers/net/ethernet/freescale/ucc_geth.c | 2 +-
1 file
From: Wang Dongsheng
When the timer GTCCR toggle bit is inverted, we calculated the rest
of the time is not accurate. So we need to ignore this bit.
Signed-off-by: Wang Dongsheng
diff --git a/arch/powerpc/sysdev/mpic_timer.c b/arch/powerpc/sysdev/mpic_timer.c
index 22d7d57..0fb70c9 100644
---
On Fri, Dec 20, 2013 at 01:06:01PM -0600, Brian W Hart wrote:
>V2: Replace driver-global 'hub_diag' with a per-PHB hub diag structure.
>
>Prevent ioda_eeh_hub_diag() from clobbering itself when called by supplying
>a per-PHB buffer for P7IOC hub diagnostic data. Take care to inform OPAL of
>the co
The ibmveth driver is memcpy()'ing the mac address between a variable
(register) and memory. This assumes a certain endianness of the
system, so let's make that implicit assumption work again.
This patch adds be64_to_cpu() calls to all places where the mac address
gets memcpy()'ed into a local var
Some hypervisors don't implement the H_SET_MODE hypercall that we
need to set the ILE bit in LPCR which allows us to execute interrupts
in little endian mode.
However otherwise we would be able to run on those hypervisors just
fine.
So let's be creative. This patch creates a few small helpers tha
We need to access every interrupt vector we can find soon, so let's
make them all visible through names to outside code.
Signed-off-by: Alexander Graf
---
arch/powerpc/kernel/exceptions-64s.S | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/powerpc/kernel/exceptions-64s.S
b/arch/po
We need to patch an instruction that is covered by the fixup
framework. If we don't do anything about it we end up getting
our own patched instruction unpatched by nops by the fixups.
So add an export to the fixup code that allows us to tell it
that an instruction moved location in memory. This wo
Howdy,
There are a few machines out there that would be pretty ppc64le capable
if only it wasn't for the hypervisor that's running on them.
The problem is that we need to run in ILE (interrupts delivered in little
endian) mode to run our normal interrupt vectors. The hypercall to enable
this mode
Our Little Endian kernels can now live in a world where they are
running with Big Endian interrupts enabled. That is great for kexec,
because now we don't have to switch back to Big Endian mode.
Indicate this in the code. Only try to go into Big Endian mode when
we're not already there yet.
Signe
p_end is an 8 byte value embedded in the text section. This means it
is only 4 byte aligned when it should be 8 byte aligned. Fix this
by adding an explicit alignment.
This fixes an issue where POWER7 little endian builds with
CONFIG_RELOCATABLE=y fail to boot.
Signed-off-by: Anton Blanchard
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