From: "Paul E. McKenney"
The csum_partial_copy_generic() uses register r7 to adjust the remaining
bytes to process. Unfortunately, r7 also holds a parameter, namely the
address of the flag to set in case of access exceptions while reading
the source buffer. Lacking a quantum implementation of P
On Tuesday 01 October 2013 10:20 AM, Michael Ellerman wrote:
> On Mon, Sep 30, 2013 at 04:47:29PM +0530, Madhavan Srinivasan wrote:
>> Currently pmc setup macros are used for non pmc sprs. This patch
>> add new set of macros and cleans up the code to use the new setup macro
>> for non pmc sprs.
>
Hi Maddy,
On Fri, Sep 27, 2013 at 05:03:54PM +0530, Madhavan Srinivasan wrote:
> powerpc/kernel/sysfs.c exports purr with write permission.
PURR
> This is only valid for kernel in hypervisor mode.
> But writing to the file in PowerVM lpar causes crash.
In the kernel history/source we refer to i
On Sun, Sep 29, 2013 at 02:41:18PM +0200, Vladimir Murzin wrote:
> While cross-building for PPC64 I've got bunch of
>
> WARNING: arch/powerpc/kernel/built-in.o(.text.unlikely+0x2d2): Section
> mismatch in reference from the function .free_lppacas() to the variable
> .init.data:lppaca_size The func
On Mon, Sep 30, 2013 at 03:11:42PM +0200, Bartlomiej Zolnierkiewicz wrote:
> __initdata tag should be placed between the variable name and equal
> sign for the variable to be placed in the intended .init.data section.
I see lots of other occurences of that in arch/powerpc. Why not send a
single pa
>> Well we don't have to, I think Mikey wasn't totally clear about that
>> "making all registers volatile" business :-) This is just something we
>> need to handle in assembly if we are going to reclaim the suspended
>> transaction.
Yeah, sorry. The slow path with all registers as volatile is onl
On Mon, Sep 30, 2013 at 04:47:29PM +0530, Madhavan Srinivasan wrote:
> Currently pmc setup macros are used for non pmc sprs. This patch
> add new set of macros and cleans up the code to use the new setup macro
> for non pmc sprs.
Hi Maddy,
Firstly you should use "PMC" not pmc, it's an acronym. Yo
On Tue, Oct 01, 2013 at 01:54:10PM +1000, Alistair Popple wrote:
> This patch initialises the iommu page size used for vio, cell, powernv
> and pseries platforms to 4K. It has been boot tested on a pseries
> machine with vio.
This patch fixes the build errors introduced by the previous patch
righ
On Thu, Sep 19, 2013 at 09:50:35AM -0700, Nishanth Aravamudan wrote:
> Under heavy (DLPAR?) stress, we tripped this panic() in
> arch/powerpc/kernel/iommu.c::iommu_init_table():
>
> page = alloc_pages_node(nid, GFP_ATOMIC, get_order(sz));
> if (!page)
> panic("iommu
This patch initialises the iommu page size used for vio, cell, powernv
and pseries platforms to 4K. It has been boot tested on a pseries
machine with vio.
Signed-off-by: Alistair Popple
---
arch/powerpc/kernel/vio.c | 20 +++-
arch/powerpc/platforms/cell/iommu.c
Currently the iommu uses hardcoded pages sizes of 4K even though some
hardware supports other page sizes. This patch adds a field (it_page_shift)
to struct iommu_table to support different page sizes and updates the generic
iommu code to use that field.
Signed-off-by: Alistair Popple
---
arch/po
This series of patches adds support for iommu page sizes other than
4K. Currently iommu page sizes are hardcoded to 4K. This series does
not actually change the page size but adds support for doing so.
It has been tested on a pSeries machine.
Alistair Popple (2):
iommu: Add support for iommu pa
On 10/01/2013 01:17 AM, Scott Wood wrote:
On Mon, 2013-09-30 at 12:24 +0530, Prabhakar Kushwaha wrote:
- Removed l2switch. It will be added later
Why?
I am not aware of bindings required for l2switch as we are not working
on the driver.
Earlier I thought of putting a place holder. but a
On 10/01/2013 01:17 AM, Scott Wood wrote:
On Mon, 2013-09-30 at 12:24 +0530, Prabhakar Kushwaha wrote:
- Removed l2switch. It will be added later
Why?
I am not aware of bindings required for l2switch as we are not working
on the driver.
Earlier I thought of putting a place holder. but a
On Tue, Oct 01, 2013 at 12:05:03PM +1000, Benjamin Herrenschmidt wrote:
> On Mon, 2013-09-30 at 17:56 -0700, Linus Torvalds wrote:
> > On Mon, Sep 30, 2013 at 5:36 PM, Michael Neuling wrote:
> > >
> > > The scary part is that we to make all register volatile. You were not
> > > that keen on doing
On Mon, 2013-09-30 at 17:56 -0700, Linus Torvalds wrote:
> On Mon, Sep 30, 2013 at 5:36 PM, Michael Neuling wrote:
> >
> > The scary part is that we to make all register volatile. You were not
> > that keen on doing this as there are a lot of places in exception
> > entry/exit where we only save/
On Sun, Sep 29, 2013 at 8:52 PM, Lian Minghuan-b31939
wrote:
>
> How about PCI_FSL_COMMON?
That's not any better. The problem is that you have two symbols for
generic/common FSL PCI support. Adding the word "common" does not
help. You need to make the symbols distinct. Either that, or merge
t
On Mon, Sep 30, 2013 at 5:36 PM, Michael Neuling wrote:
>
> The scary part is that we to make all register volatile. You were not
> that keen on doing this as there are a lot of places in exception
> entry/exit where we only save/restore a subset of the registers. We'd
> need to catch all these.
Ben,
> On Mon, 2013-09-30 at 12:29 -0700, Linus Torvalds wrote:
> >
> > But I'm cc'ing the POWER people, because I don't know the POWER8
> > interfaces, and I don't want to necessarily call this "xbegin"/"xend"
> > when I actually wrap it in some helper functions.
>
> The main problem with power
On Sun, 2013-09-29 at 01:57 -0500, Wang Dongsheng-B40534 wrote:
>
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Saturday, September 28, 2013 5:33 AM
> > To: Wang Dongsheng-B40534
> > Cc: Wood Scott-B07421; Bhushan Bharat-R65777; linuxppc-
> > d...@lists.ozlabs.org
> > Subjec
On Mon, 2013-09-30 at 12:29 -0700, Linus Torvalds wrote:
>
> But I'm cc'ing the POWER people, because I don't know the POWER8
> interfaces, and I don't want to necessarily call this "xbegin"/"xend"
> when I actually wrap it in some helper functions.
The main problem with powerpc TM is that we nee
On Sun, 2013-09-29 at 19:51 +0800, Lian Minghuan-b31939 wrote:
> >> +/*
> >> + * The fsl_arch_* functions are arch hooks. Those functions are
> >> + * implemented as weak symbols so that they can be overridden by
> >> + * architecture specific code if needed.
> >> + */
> >> +
> >> +/* Return PCI64
On Mon, 2013-09-30 at 09:52 +0800, Lian Minghuan-b31939 wrote:
> Hi Timur,
>
> Thanks for your comments.
>
> How about PCI_FSL_COMMON?
Why not just have one symbol, which is used in the makefile in both
drivers/pci and arch/?
-Scott
___
Linuxppc-de
Enable cpufreq on iMac G5 (iSight) model. Tested with the 2.1 GHz version.
Signed-off-by: Aaro Koskinen
Acked-by: Viresh Kumar
---
drivers/cpufreq/pmac64-cpufreq.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/cpufreq/pmac64-cpufreq.c b/drivers/cpufreq/pmac64-cpu
Hi,
This is a resend of the v2 patchset:
http://marc.info/?t=13779701321&r=1&w=2
No changes except rebasing. Any chance to get these into v3.13?
Aaro Koskinen (3):
cpufreq: pmac64: speed up frequency switch
cpufreq: pmac64: provide cpufreq transition latency for older G5
mod
Currently cpufreq ondemand governor cannot used on older G5 models,
because the transition latency is set to CPUFREQ_ETERNAL. Provide a
value based on a measurement on Xserve G5, which happens to be also the
highest allowed latency.
Signed-off-by: Aaro Koskinen
---
drivers/cpufreq/pmac64-cpufreq
Some functions on switch path use msleep() which is inaccurate, and
depends on HZ. With HZ=100 msleep(1) takes actually over ten times longer.
Using usleep_range() we get more accurate sleeps.
I measured the "pfunc_slewing_done" polling to take 300us at max (on
2.3GHz dual-processor Xserve G5), so
On 09/30/2013 03:29 PM, Linus Torvalds wrote:
So with all the lockref work, we now avoid the dentry d_lock for
almost all normal cases.
There is one single remaining common case, though: the final dput()
when the dentry count goes down to zero, and we need to check if we
are supposed to get rid
On Mon, Sep 30, 2013 at 1:01 PM, Waiman Long wrote:
>
> I think this patch is worth a trial if relevant hardware is more widely
> available. The TSX code certainly need to be moved to an architecture
> specific area and should be runtime enabled using a static key. We also need
> more TSX support
On Mon, 2013-09-30 at 12:24 +0530, Prabhakar Kushwaha wrote:
> - Removed l2switch. It will be added later
Why?
> +sata@22 {
> + fsl,iommu-parent = <&pamu0>;
> + fsl,liodn-reg = <&guts 0x550>; /* SATA1LIODNR */
> +};
> +/include/ "qoriq-sata2-1.dtsi"
So with all the lockref work, we now avoid the dentry d_lock for
almost all normal cases.
There is one single remaining common case, though: the final dput()
when the dentry count goes down to zero, and we need to check if we
are supposed to get rid of the dentry (or at least put it on the LRU
lis
From: Aida Mynzhasova
Date: Wed, 25 Sep 2013 11:24:23 +0400
> Currently IEEE 1588 timer reference clock source is determined through
> hard-coded value in gianfar_ptp driver. This patch allows to select ptp
> clock source by means of device tree file node.
>
> For instance:
>
> fsl,cksel
On 09/23/2013 04:05 AM, Anton Blanchard wrote:
Add support for the H_SET_MODE hcall so we can select the
endianness of our exceptions.
We create a guest MSR from scratch when delivering exceptions in
a few places and instead of extracing the LPCR[ILE] and inserting
it into MSR_LE each time simpl
On 09/30/2013 06:20 PM, Aneesh Kumar K.V wrote:
Alexander Graf writes:
On 09/30/2013 02:56 PM, Aneesh Kumar K.V wrote:
Alexander Graf writes:
On 27.09.2013, at 15:03, Aneesh Kumar K.V wrote:
Alexander Graf writes:
diff --git a/arch/powerpc/kvm/book3s_segment.S
b/arch/powerpc/kvm/b
Alexander Graf writes:
> On 09/30/2013 02:56 PM, Aneesh Kumar K.V wrote:
>> Alexander Graf writes:
>>
>>> On 27.09.2013, at 15:03, Aneesh Kumar K.V wrote:
>>>
Alexander Graf writes:
>> diff --git a/arch/powerpc/kvm/book3s_segment.S
>> b/arch/powerpc/kvm/book3s_segment.S
Alexander Graf writes:
> On 09/30/2013 02:57 PM, Aneesh Kumar K.V wrote:
>> Alexander Graf writes:
>> diff --git a/arch/powerpc/kvm/trace.h b/arch/powerpc/kvm/trace.h
>> index a088e9a..7d5a136 100644
>> --- a/arch/powerpc/kvm/trace.h
>> +++ b/arch/powerpc/kvm/trace.h
>> @@ -8
On 09/30/2013 05:53 PM, Aneesh Kumar K.V wrote:
Alexander Graf writes:
On 09/30/2013 02:57 PM, Aneesh Kumar K.V wrote:
Alexander Graf writes:
diff --git a/arch/powerpc/kvm/trace.h b/arch/powerpc/kvm/trace.h
index a088e9a..7d5a136 100644
--- a/arch/powerpc/kvm/trace.h
+++ b/arch/powerpc/kvm
On Monday, September 30, 2013 03:20:29 PM David Laight wrote:
> > __initdata tag should be placed between the variable name and equal
> > sign for the variable to be placed in the intended .init.data section.
> ...
> > -static struct __initdata cpm_pin tqm8xx_pins[] = {
> > +static struct cpm_pin t
On 09/30/2013 03:09 PM, Aneesh Kumar K.V wrote:
Alexander Graf writes:
On 27.09.2013, at 12:52, Aneesh Kumar K.V wrote:
"Aneesh Kumar K.V" writes:
Hi All,
This patch series support enabling HV and PR KVM together in the same kernel. We
extend machine property with new property "kvm_type"
On 09/30/2013 02:57 PM, Aneesh Kumar K.V wrote:
Alexander Graf writes:
On 27.09.2013, at 15:06, Aneesh Kumar K.V wrote:
Alexander Graf writes:
On 27.09.2013, at 12:03, Aneesh Kumar K.V wrote:
From: "Aneesh Kumar K.V"
This patch moves PR related tracepoints to a separate header. This
en
On 09/30/2013 02:56 PM, Aneesh Kumar K.V wrote:
Alexander Graf writes:
On 27.09.2013, at 15:03, Aneesh Kumar K.V wrote:
Alexander Graf writes:
diff --git a/arch/powerpc/kvm/book3s_segment.S
b/arch/powerpc/kvm/book3s_segment.S
index 1abe478..e0229dd 100644
--- a/arch/powerpc/kvm/book3s_s
> __initdata tag should be placed between the variable name and equal
> sign for the variable to be placed in the intended .init.data section.
...
> -static struct __initdata cpm_pin tqm8xx_pins[] = {
> +static struct cpm_pin tqm8xx_pins[] __initdata = {
As far as gcc is concerned it can go almost
__initdata tag should be placed between the variable name and equal
sign for the variable to be placed in the intended .init.data section.
Signed-off-by: Bartlomiej Zolnierkiewicz
Signed-off-by: Kyungmin Park
---
arch/powerpc/platforms/8xx/tqm8xx_setup.c | 4 ++--
1 file changed, 2 insertions(+
__initdata tag should be placed between the variable name and equal
sign for the variable to be placed in the intended .init.data section.
Signed-off-by: Bartlomiej Zolnierkiewicz
Signed-off-by: Kyungmin Park
---
arch/powerpc/kernel/legacy_serial.c | 2 +-
1 file changed, 1 insertion(+), 1 dele
Alexander Graf writes:
> On 27.09.2013, at 12:52, Aneesh Kumar K.V wrote:
>
>> "Aneesh Kumar K.V" writes:
>>
>>> Hi All,
>>>
>>> This patch series support enabling HV and PR KVM together in the same
>>> kernel. We
>>> extend machine property with new property "kvm_type". A value of 1 will
>>
Alexander Graf writes:
> On 27.09.2013, at 15:08, Aneesh Kumar K.V wrote:
>
>> Alexander Graf writes:
>>
>>> On 27.09.2013, at 12:03, Aneesh Kumar K.V wrote:
>>>
diff --git a/arch/powerpc/kvm/book3s_64_mmu_host.c
b/arch/powerpc/kvm/book3s_64_mmu_host.c
index fd5b393..775d368 10
Alexander Graf writes:
> On 27.09.2013, at 15:06, Aneesh Kumar K.V wrote:
>
>> Alexander Graf writes:
>>
>>> On 27.09.2013, at 12:03, Aneesh Kumar K.V wrote:
>>>
From: "Aneesh Kumar K.V"
This patch moves PR related tracepoints to a separate header. This
enables in convert
Alexander Graf writes:
> On 27.09.2013, at 15:03, Aneesh Kumar K.V wrote:
>
>> Alexander Graf writes:
>>
>>
diff --git a/arch/powerpc/kvm/book3s_segment.S
b/arch/powerpc/kvm/book3s_segment.S
index 1abe478..e0229dd 100644
--- a/arch/powerpc/kvm/book3s_segment.S
+++ b/a
Currently pmc setup macros are used for non pmc sprs. This patch
add new set of macros and cleans up the code to use the new setup macro
for non pmc sprs.
Signed-off-by: Madhavan Srinivasan
---
arch/powerpc/kernel/sysfs.c | 95 ---
1 file changed, 63 ins
On 27.09.2013, at 12:52, Aneesh Kumar K.V wrote:
> "Aneesh Kumar K.V" writes:
>
>> Hi All,
>>
>> This patch series support enabling HV and PR KVM together in the same
>> kernel. We
>> extend machine property with new property "kvm_type". A value of 1 will
>> force HV
>> KVM and 2 PR KVM. The
On 27.09.2013, at 15:03, Aneesh Kumar K.V wrote:
> Alexander Graf writes:
>
>> On 27.09.2013, at 12:03, Aneesh Kumar K.V wrote:
>>
>>> From: "Aneesh Kumar K.V"
>>>
>>> This help us to identify whether we are running with hypervisor mode KVM
>>> enabled. The change is needed so that we can ha
On 27.09.2013, at 15:08, Aneesh Kumar K.V wrote:
> Alexander Graf writes:
>
>> On 27.09.2013, at 12:03, Aneesh Kumar K.V wrote:
>>
>>> diff --git a/arch/powerpc/kvm/book3s_64_mmu_host.c
>>> b/arch/powerpc/kvm/book3s_64_mmu_host.c
>>> index fd5b393..775d368 100644
>>> --- a/arch/powerpc/kvm/bo
On 27.09.2013, at 15:06, Aneesh Kumar K.V wrote:
> Alexander Graf writes:
>
>> On 27.09.2013, at 12:03, Aneesh Kumar K.V wrote:
>>
>>> From: "Aneesh Kumar K.V"
>>>
>>> This patch moves PR related tracepoints to a separate header. This
>>> enables in converting PR to a kernel module which wil
The Freescale's Layerscape series processors will use ARM cores.
The LS1's PCIe controllers is the same as T4240's. So it's better
the PCIe controller driver can support PowerPC and ARM
simultaneously. This patch is for this purpose. It derives
the common functions from arch/powerpc/sysdev/fsl_pci.
The Freescale's Layerscape series processors will use the same PCI
controller but change cores from PowerPC to ARM. This patch is to
rework FSL PCI driver to support PowerPC and ARM simultaneously.
PowerPC uses structure pci_controller to describe PCI controller,
but arm uses structure hw_pci and p
> -Original Message-
> From: Wood Scott-B07421
> Sent: Wednesday, September 25, 2013 3:37 AM
> To: Hu Mingkai-B21284
> Cc: Wood Scott-B07421; linuxppc-...@ozlabs.org
> Subject: Re: [PATCH] powerpc/85xx: DTS - re-organize the SPI partitions
> property
>
> On Tue, 2013-09-24 at 05:27 -0500
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