Re: [RFC PATCH v3 08/12] powerpc/book3s: Flush SLB/TLBs if we get SLB/TLB machine check errors on power8.

On Tue, Aug 27, 2013 at 01:02:20AM +0530, Mahesh J Salgaonkar wrote: > From: Mahesh Salgaonkar > > This patch handles the memory errors on power8. If we get a machine check > exception due to SLB or TLB errors, then flush SLBs/TLBs and reload SLBs to > recover. > > Signed-off-by: Mahesh Salgaonk

Re: [RFC PATCH v3 06/12] powerpc/book3s: Add flush_tlb operation in cpu_spec.

On Tue, Aug 27, 2013 at 01:02:04AM +0530, Mahesh J Salgaonkar wrote: > From: Mahesh Salgaonkar > > This patch introduces flush_tlb operation in cpu_spec structure. This will > help us to invoke appropriate CPU-side flush tlb routine. This patch > adds the foundation to invoke CPU specific flush r

Re: [RFC PATCH v3 07/12] powerpc/book3s: Flush SLB/TLBs if we get SLB/TLB machine check errors on power7.

On Tue, Aug 27, 2013 at 01:02:12AM +0530, Mahesh J Salgaonkar wrote: > From: Mahesh Salgaonkar > > If we get a machine check exception due to SLB or TLB errors, then flush > SLBs/TLBs and reload SLBs to recover. We do this in real mode before turning > on MMU. Otherwise we would run into nested m

Re: [RFC PATCH v3 05/12] powerpc/book3s: Introduce a early machine check hook in cpu_spec.

On Tue, Aug 27, 2013 at 01:01:56AM +0530, Mahesh J Salgaonkar wrote: > From: Mahesh Salgaonkar > > This patch adds the early machine check function pointer in cputable for > CPU specific early machine check handling. The early machine handle routine > will be called in real mode to handle SLB and

Re: [RFC PATCH v3 04/12] Validate r1 value before going to host kernel in virtual mode.

On Tue, Aug 27, 2013 at 01:01:48AM +0530, Mahesh J Salgaonkar wrote: > From: Mahesh Salgaonkar > > We can get machine checks from any context. We need to make sure that > we handle all of them correctly. Once we decode MCE reason and generate > MCE event, we continue in host kernel in virtual mod

Re: [RFC PATCH v3 01/12] powerpc/book3s: Split the common exception prolog logic into two section.

On Tue, Aug 27, 2013 at 01:01:24AM +0530, Mahesh J Salgaonkar wrote: > From: Mahesh Salgaonkar > > This patch splits the common exception prolog logic into two parts to > facilitate reuse of existing code in the next patch. The second part will > be reused in the machine check exception routine i

Re: [RFC PATCH v3 02/12] powerpc/book3s: Introduce exclusive emergency stack for machine check exception.

On Tue, Aug 27, 2013 at 01:01:32AM +0530, Mahesh J Salgaonkar wrote: > From: Mahesh Salgaonkar > > This patch introduces exclusive emergency stack for machine check exception. > We use emergency stack to handle machine check exception so that we can save > MCE information (srr1, srr0, dar and dsi

Re: [RFC PATCH v3 03/12] powerpc/book3s: handle machine check in Linux host.

On Tue, Aug 27, 2013 at 01:01:40AM +0530, Mahesh J Salgaonkar wrote: > From: Mahesh Salgaonkar > > Move machine check entry point into Linux. So far we were dependent on > firmware to decode MCE error details and handover the high level info to OS. > > This patch introduces early machine check r

RE: [PATCH V3 2/2] powerpc/85xx: Add TWR-P1025 board support

Xiaobo, You can use interrupts = <1 1 0 0> instead of interrupts = <1 1> with test on P1025twr. It was mislead by hardware issue on p1010rdb-pb board. Regards, Shengzhou > -Original Message- > From: Linuxppc-dev [mailto:linuxppc-dev- > bounces+shengzhou.liu=freescale@lists.ozlabs.or

[PATCH V3] powerpc: Add I2C bus multiplexer node for B4 and T4240QDS

In both B4 and T4240QDS platform PCA9547 I2C bus multiplexer is used. The sub-nodes are also reorganized according to right I2C topology. Signed-off-by: Jia Hongtao --- V3 change log: * change "channel" to "i2c" based on i2c-mux binding. V2 change log: * Reorganized the sub-nodes under I2C multi

RE: [PATCH V2] powerpc: Add I2C bus multiplexer node for B4 and T4240QDS

Great thanks. I will update the patch and send it soon. -Hongtao > -Original Message- > From: Linuxppc-dev [mailto:linuxppc-dev- > bounces+b38951=freescale@lists.ozlabs.org] On Behalf Of Kumar Gala > Sent: Saturday, September 07, 2013 12:10 AM > To: Jia Hongtao-B38951 > Cc: Wood Scot

Re: [PATCH] powerpc: OE=1 Form Instructions Not Decoded Correctly

On Fri, Sep 06, 2013 at 10:13:00AM -0500, Tom Musta wrote: > To: linuxppc-dev@lists.ozlabs.org > Subject: [PATCH] powerpc: OE=1 Form Instructions Not Decoded Correctly > From: Tom Musta > > PowerISA uses instruction bit 21 to indicate that the overflow (OV) bit > of the XER is to be set, as well

powerpc allmodconfig build broken due to commit 15863ff3b (powerpc: Make chip-id information available to userspace)

Hi all, powerpc allmodconfig build on the latest upstream kernel results in: ERROR: ".cpu_to_chip_id" [drivers/block/mtip32xx/mtip32xx.ko] undefined! This is due to commit 15863ff3b (powerpc: Make chip-id information available to userspace). Not surprising, as cpu_to_chip_id() is not exported.

Re: [PATCH v4 12/19] cpufreq: cpufreq-cpu0: remove device tree parsing for cpu nodes

Hi On Tue, 20 Aug 2013, Sudeep KarkadaNagesha wrote: > From: Sudeep KarkadaNagesha > > Now that the cpu device registration initialises the of_node(if available) > appropriately for all the cpus, parsing here is redundant. > > This patch removes all DT parsing and uses cpu->of_node instead. >

Re: [PATCH v10 12/13] KVM: PPC: Add support for IOMMU in-kernel handling

On Fri, Sep 06, 2013 at 08:40:26PM +1000, Alexey Kardashevskiy wrote: > This allows the host kernel to handle H_PUT_TCE, H_PUT_TCE_INDIRECT > and H_STUFF_TCE requests targeted an IOMMU TCE table without passing > them to user space which saves time on switching to user space and back. > > Both rea

[PATCH] powerpc: OE=1 Form Instructions Not Decoded Correctly

To: linuxppc-dev@lists.ozlabs.org Subject: [PATCH] powerpc: OE=1 Form Instructions Not Decoded Correctly From: Tom Musta PowerISA uses instruction bit 21 to indicate that the overflow (OV) bit of the XER is to be set, as well as its corresponding sticky bit (SO). This patch addresses two defects