Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/sysdev/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/sysdev/Kconfig b/arch/powerpc/sysdev/Kconfig
index ab4cb54..13ec968 100644
--- a/arch/powerpc/sysdev/Kconfig
+++ b/arch/powerpc/sysdev/Kconfig
@@
OPAL v3 provides interfaces to access the chips XSCOM, expose
this via the existing scom infrastructure.
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/platforms/powernv/Kconfig | 1 +
arch/powerpc/platforms/powernv/Makefile | 1 +
arch/powerpc/platforms/powernv/opal-xscom.c
When creating the debugfs scom files, use "ibm,chip-id" as the scom%d
index rather than a simple made up number when possible.
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/sysdev/scom.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/sysdev/sco
scom_read() now returns the read value via a pointer argument and
both functions return an int error code
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/include/asm/scom.h | 23 +--
arch/powerpc/platforms/wsp/scom_smp.c | 18 +-
arch/powerpc/plat
When devices are direct children of a scom controller node, they
should be able to use the normal "reg" property instead of "scom-reg".
In that case, they also use #address-cells rather than #scom-cells
to indicate the size of an entry.
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/sys
isa_io_special is set when the platform provides a "special"
implementation of inX/outX via some FW interface for example.
Such a platform doesn't need an ISA bridge on PCI, and so /dev/port
should be made available even if one isn't present.
This makes the LPC bus IOs accessible via /dev/port on
On Fri, Aug 23, 2013 at 05:01:07PM -0300, Marcelo Cerri wrote:
> This patch updates the nx-aes-cbc implementation to perform several
> hyper calls if needed in order to always respect the length limits for
> scatter/gather lists.
>
> Two different limits are considered:
>
> - "ibm,max-sg-len": m
Freescale T4240QDS reference board has extra voltage shifters added
to allow 3.3V operation, so add 3.3v voltage support for T4240QDS.
1.8v and 3.3v is recommand for eMMC and SDHC card.
Signed-off-by: Haijun Zhang
---
arch/powerpc/boot/dts/t4240qds.dts | 4
1 file changed, 4 insertions(+)
On 08/28/2013 08:51 PM, Mark Rutland wrote:
On Wed, Aug 28, 2013 at 07:54:01AM +0100, Hongbo Zhang wrote:
On 08/27/2013 07:35 PM, Mark Rutland wrote:
On Tue, Aug 27, 2013 at 11:42:02AM +0100, hongbo.zh...@freescale.com wrote:
From: Hongbo Zhang
Freescale QorIQ T4 and B4 introduce new 8-chann
From: Wei Yongjun
There is a error message within devm_ioremap_resource
already, so remove the dev_err call to avoid redundant
error message.
Signed-off-by: Wei Yongjun
---
sound/soc/fsl/fsl_spdif.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/sound/soc/fsl/fsl_spdif.
On Wed, 2013-08-28 at 17:59 +0200, Gerhard Sittig wrote:
> On Wed, Aug 28, 2013 at 14:08 +0200, Gerhard Sittig wrote:
> >
> > [ re-created the Cc: list, this is about the PCI clock exclusively ]
>
> I just noticed by coincidence that the message which I received
> back from the linuxppc-dev ML ap
On Thu, 22 Aug 2013 14:59:30 +0100, Mark Rutland wrote:
> On Mon, Aug 19, 2013 at 02:56:10PM +0100, Sudeep KarkadaNagesha wrote:
> > On 19/08/13 14:02, Rob Herring wrote:
> > > On 08/19/2013 05:19 AM, Mark Rutland wrote:
> > >> On Sat, Aug 17, 2013 at 11:09:36PM +0100, Benjamin Herrenschmidt wrote
On Thu, 22 Aug 2013 18:00:14 +0200, Wolfram Sang wrote:
> I2C of helpers used to live in of_i2c.c but experience (from SPI) shows
> that it is much cleaner to have this in the core. This also removes a
> circular dependency between the helpers and the core, and so we can
> finally register child n
On Wed, Aug 28, 2013 at 14:08 +0200, Gerhard Sittig wrote:
>
> [ re-created the Cc: list, this is about the PCI clock exclusively ]
I just noticed by coincidence that the message which I received
back from the linuxppc-dev ML appeared to have dropped Benjamin
Herrenschmidt and Kumar Gala from the
On 17.07.2013, at 17:10, Thadeu Lima de Souza Cascardo wrote:
> err was overwritten by a previous function call, and checked to be 0. If
> the following page allocation fails, 0 is going to be returned instead
> of -ENOMEM.
>
> Signed-off-by: Thadeu Lima de Souza Cascardo
Thanks, applied to kv
On 05.08.2013, at 07:50, Chen Gang wrote:
> On 08/05/2013 12:34 PM, Paul Mackerras wrote:
>> On Mon, Jul 22, 2013 at 02:32:35PM +0800, Chen Gang wrote:
'rmls' is 'unsigned long', lpcr_rmls() will return negative number when
failure occurs, so it need a type cast for comparing.
>>>
This patch modifies the Oops message in case of Software Emulation Exception.
The existing message is quite confusing because it refers to FPU Emulation
while most often the issue is due to either a non supported instruction
(not necessarily FPU related) or a stale instruction due to HW issues.
The
[ summary for the busy or the impatient:
this is a status update on the series
- peripheral driver cleanup considered appropriate for v3.12
- common clock support introduction isn't ready yet
- which in turn holds subsequent parts
- while the overall shape of the series is looking good ]
On Wed, Aug 28, 2013 at 07:54:01AM +0100, Hongbo Zhang wrote:
> On 08/27/2013 07:35 PM, Mark Rutland wrote:
> > On Tue, Aug 27, 2013 at 11:42:02AM +0100, hongbo.zh...@freescale.com wrote:
> >> From: Hongbo Zhang
> >>
> >> Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch
>
On Wed, Aug 28, 2013 at 09:18:55AM +0100, Hongbo Zhang wrote:
> On 08/27/2013 07:25 PM, Mark Rutland wrote:
> > On Tue, Aug 27, 2013 at 11:42:01AM +0100, hongbo.zh...@freescale.com wrote:
> >> From: Hongbo Zhang
> >>
> >> This patch updates the discription of each type of DMA controller and its
>
[ re-created the Cc: list, this is about the PCI clock exclusively ]
Of all the "preparation" patches in the series (parts 01-14/31,
forming the "peripheral driver cleanup" phase before the
introduction of CCF support), this patch remains the last to get
picked up.
But I'd suggest to leave this p
The Freescale's Layerscape series processors will use ARM cores.
The LS1's PCIe controllers is the same as T4240's. So it's better
the PCIe controller driver can support PowerPC and ARM
simultaneously. This patch is for this purpose. It derives
the common functions from arch/powerpc/sysdev/fsl_pci.
This adds special support for huge pages (16MB) in real mode.
The reference counting cannot be easily done for such pages in real
mode (when MMU is off) so we added a hash table of huge pages.
It is populated in virtual mode and get_page is called just once
per a huge page. Real mode handlers chec
This allows the host kernel to handle H_PUT_TCE, H_PUT_TCE_INDIRECT
and H_STUFF_TCE requests targeted an IOMMU TCE table without passing
them to user space which saves time on switching to user space and back.
Both real and virtual modes are supported. The kernel tries to
handle a TCE request in t
KVM is going to use VFIO's external API. However KVM can operate even VFIO
is not compiled or loaded so KVM is linked to VFIO dynamically.
This adds proxy functions for VFIO external API.
Signed-off-by: Alexey Kardashevskiy
---
arch/powerpc/kvm/book3s_64_vio.c | 49 +
Book3S KVM implements in-kernel TCE tables via kvmppc_spapr_tce_table
structs list (created per KVM). Entries in the list are per LIOBN
(logical bus number) and have a TCE table so DMA hypercalls (such as
H_PUT_TCE) can convert LIOBN to a TCE table.
The entry in the list is created via KVM_CREATE_
The TCE tables handling may differ for real and virtual modes so
additional ppc_md.tce_build_rm/ppc_md.tce_free_rm/ppc_md.tce_flush_rm
handlers were introduced earlier.
So this adds the following:
1. support for the new ppc_md calls;
2. ability to iommu_tce_build to process mupltiple entries per
c
This adds real mode handlers for the H_PUT_TCE_INDIRECT and
H_STUFF_TCE hypercalls for user space emulated devices such as IBMVIO
devices or emulated PCI. These calls allow adding multiple entries
(up to 512) into the TCE table in one call which saves time on
transition to/from real mode.
This ad
It does not make much sense to have KVM in book3s-64bit and
not to have IOMMU bits for PCI pass through support as it costs little
and allows VFIO to function on book3s-kvm.
Having IOMMU_API always enabled makes it unnecessary to have a lot of
"#ifdef IOMMU_API" in arch/powerpc/kvm/book3s_64_vio*.
The current VFIO-on-POWER implementation supports only user mode
driven mapping, i.e. QEMU is sending requests to map/unmap pages.
However this approach is really slow, so we want to move that to KVM.
Since H_PUT_TCE can be extremely performance sensitive (especially with
network adapters where eac
The existing TCE machine calls (tce_build and tce_free) only support
virtual mode as they call __raw_writeq for TCE invalidation what
fails in real mode.
This introduces tce_build_rm and tce_free_rm real mode versions
which do mostly the same but use "Store Doubleword Caching Inhibited
Indexed" in
This reserves a capability number for upcoming support
of VFIO-IOMMU DMA operations in real mode.
This reserves a number for a new "SPAPR TCE IOMMU" KVM device
which is going to manage lifetime of SPAPR TCE IOMMU object.
This defines an attribute of the "SPAPR TCE IOMMU" KVM device
which is going
This adds hash_for_each_possible_rcu_notrace() which is basically
a notrace clone of hash_for_each_possible_rcu() which cannot be
used in real mode due to its tracing/debugging capability.
Signed-off-by: Alexey Kardashevskiy
---
Changes:
v8:
* fixed warnings from check_patch.pl
---
include/linu
This is to reserve a capablity number for upcoming support
of H_PUT_TCE_INDIRECT and H_STUFF_TCE pseries hypercalls
which support mulptiple DMA map/unmap operations per one call.
Signed-off-by: Alexey Kardashevskiy
---
Changes:
2013/07/16:
* changed the number
---
include/uapi/linux/kvm.h | 1 +
The current implementation of IOMMU on sPAPR does not use iommu_ops
and therefore does not call IOMMU API's bus_set_iommu() which
1) sets iommu_ops for a bus
2) registers a bus notifier
Instead, PCI devices are added to IOMMU groups from
subsys_initcall_sync(tce_iommu_init) which does basically the
This accelerates VFIO DMA operations on POWER by moving them
into kernel.
This depends on VFIO external API patch which is on its way to upstream.
Changes:
v9:
* replaced the "link logical bus number to IOMMU group" ioctl to KVM
with a KVM device doing the same thing, i.e. the actual changes are
On 08/27/2013 07:25 PM, Mark Rutland wrote:
On Tue, Aug 27, 2013 at 11:42:01AM +0100, hongbo.zh...@freescale.com wrote:
From: Hongbo Zhang
This patch updates the discription of each type of DMA controller and its
channels, it is preparation for adding another new DMA controller binding, it
als
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