From: Wei Yongjun
The dereference should be moved below the NULL test.
spatch with a semantic match is used to found this.
(http://coccinelle.lip6.fr/)
Signed-off-by: Wei Yongjun
---
arch/powerpc/platforms/powernv/pci.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git
Geert Uytterhoeven wrote:
> Hi Mikey,
>
> On Fri, 7 Sep 2012, Michael Neuling wrote:
> > Geert Uytterhoeven wrote:
> > > On Thu, Sep 6, 2012 at 7:17 AM, Michael Neuling wrote:
> > > > Rework set_dabr to take a DABRX value as well. We are not actually
> > > > changing any functionality at
Benjamin Herrenschmidt writes:
> On Thu, 2012-09-06 at 20:59 +0530, Aneesh Kumar K.V wrote:
>> Hi,
>>
>> This patchset include patches for supporting 64TB with ppc64. I haven't
>> booted
>> this on hardware with 64TB memory yet. But they boot fine on real hardware
>> with
>> less memory. Chang
Hi Mikey,
On Fri, 7 Sep 2012, Michael Neuling wrote:
> Geert Uytterhoeven wrote:
> > On Thu, Sep 6, 2012 at 7:17 AM, Michael Neuling wrote:
> > > Rework set_dabr to take a DABRX value as well. We are not actually
> > > changing any functionality at this stage, just preparing for that.
>
On Thu, 2012-06-14 at 18:41 -0500, Scott Wood wrote:
> There are a few things that make the existing hw tablewalk handlers
> unsuitable for e6500:
>
> - Indirect entries go in TLB1 (though the resulting direct entries go in
>TLB0).
>
> - It has threads, but no "tlbsrx." -- so we need a spin
On Tue, 2012-06-12 at 17:02 -0500, Scott Wood wrote:
> It was branching to the cleanup part of the non-bolted handler,
> which would have been bad if there were any chips with tlbsrx.
> that use the bolted handler.
Still relevant ? It doesn't apply anymore :-)
Cheers,
Ben.
> Signed-off-by: Scott
Geert Uytterhoeven wrote:
> On Thu, Sep 6, 2012 at 7:17 AM, Michael Neuling wrote:
> > Rework set_dabr to take a DABRX value as well. We are not actually
> > changing any functionality at this stage, just preparing for that.
>
> You are changing functionality.
You are right.. I'll fix that up.
On Thu, 2012-09-06 at 20:59 +0530, Aneesh Kumar K.V wrote:
> Hi,
>
> This patchset include patches for supporting 64TB with ppc64. I haven't booted
> this on hardware with 64TB memory yet. But they boot fine on real hardware
> with
> less memory. Changes extend VSID bits to 38 bits for a 256MB se
On Tue, 2012-08-21 at 17:12 +0530, Suzuki K. Poulose wrote:
> There are some device-tree nodes, whose values are of type phys_addr_t.
> The phys_addr_t is variable sized based on the CONFIG_PHSY_T_64BIT.
>
> Change these to a fixed unsigned long long for consistency.
>
> This patch does the chang
On Mon, 2012-07-16 at 14:22 -0700, Sukadev Bhattiprolu wrote:
> From: Sukadev Bhattiprolu
> Date: Mon, 2 Jul 2012 08:06:14 -0700
> Subject: [PATCH 2/2][v2] powerpc/perf: Sample only if SIAR-Valid bit is set
> in P7+
>
> On POWER7+ two new bits (mmcra[35] and mmcra[36]) indicate whether the
> con
On Thu, Sep 06, 2012 at 08:59:04PM +0530, Aneesh Kumar K.V wrote:
> From: "Aneesh Kumar K.V"
>
> This patch convert different functions to take virtual page number
> instead of virtual address. Virtual page number is virtual address
> shifted right by VPN_SHIFT (12) bits. This enable us to have a
On 25.07.2012, at 20:31, Michael Neuling wrote:
> Alexander Graf wrote:
>
>> After merging the register type check patches from Ben's tree, the
>> hv enabled booke implementation ceased to compile.
>>
>> This patch fixes things up so everyone's happy again.
>
> Is there a defconfig which catc
Several files in obj-plat depend on libfdt header file. Sometimes
when building one can see the following issue. This patch adds
libfdt as dependency to those object files
| In file included from arch/powerpc/boot/treeboot-iss4xx.c:33:0:
| arch/powerpc/boot/libfdt.h:854:1: error: unterminated comm
From: "Aneesh Kumar K.V"
This patch makes the high psizes mask as an unsigned char array
so that we can have more than 16TB. Currently we support upto
64TB
Reviewed-by: Paul Mackerras
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/mmu-hash64.h |6 +-
arch/powerpc/include/asm
From: "Aneesh Kumar K.V"
With larger vsid we need to track more bits of ESID in slb cache
for slb invalidate.
Reviewed-by: Paul Mackerras
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/paca.h |2 +-
arch/powerpc/mm/slb_low.S |8
2 files changed, 5 insertio
From: "Aneesh Kumar K.V"
slice array size and slice mask size depend on PGTABLE_RANGE. We
can't directly include pgtable.h in these header because there is
a circular dependency. So add compile time check for these values.
Reviewed-by: Paul Mackerras
Signed-off-by: Aneesh Kumar K.V
---
arch/p
From: "Aneesh Kumar K.V"
This update the proto-VSID and VSID scramble related information
to be more generic by using names instead of current values.
Reviewed-by: Paul Mackerras
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/mmu-hash64.h | 40 ++---
From: "Aneesh Kumar K.V"
Increase max addressable range to 64TB. This is not tested on
real hardware yet.
Reviewed-by: Paul Mackerras
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/mmu-hash64.h| 42 --
arch/powerpc/include/asm/pgtable-ppc64-4k.h
From: "Aneesh Kumar K.V"
Don't open code the same
Reviewed-by: Paul Mackerras
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/platforms/cell/beat_htab.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/platforms/cell/beat_htab.c
b/arch/powerpc/platforms/ce
From: "Aneesh Kumar K.V"
ASM_VSID_SCRAMBLE can leave non-zero bits in the high 28 bits of the result
for 256MB segment (40 bits for 1T segment). Properly mask them before using
the values in slbmte
Reviewed-by: Paul Mackerras
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/mm/slb_low.S | 1
From: "Aneesh Kumar K.V"
As we keep increasing PGTABLE_RANGE we need not increase the virual
map area for kernel.
Reviewed-by: Paul Mackerras
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/pgtable-ppc64.h |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arc
From: "Aneesh Kumar K.V"
This patch convert different functions to take virtual page number
instead of virtual address. Virtual page number is virtual address
shifted right by VPN_SHIFT (12) bits. This enable us to have an
address range of upto 76 bits.
Signed-off-by: Aneesh Kumar K.V
---
arch
From: "Aneesh Kumar K.V"
This patch simplify hpte_decode for easy switching of virtual address to
virtual page number in the later patch
Reviewed-by: Paul Mackerras
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/mm/hash_native_64.c | 49 ++
1 file chang
Hi,
This patchset include patches for supporting 64TB with ppc64. I haven't booted
this on hardware with 64TB memory yet. But they boot fine on real hardware with
less memory. Changes extend VSID bits to 38 bits for a 256MB segment
and 26 bits for 1TB segments.
Changes from V7:
* Address review
From: "Aneesh Kumar K.V"
To clarify the meaning for future readers, replace the open coded
19 with CONTEXT_BITS
Reviewed-by: Paul Mackerras
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/mm/mmu_context_hash64.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powe
On Thu, Sep 06, 2012 at 04:32:28PM +0200, Enrico Scholz wrote:
> Chen Peter-B29397 writes:
>
> > If the class driver has already mapped this address, the req->req.dma is not
> > DMA_ADDR_INVALID either, in this case, the dma_sync_single_for_cpu is
> > enough.
>
> ok; forget the patch then.
fair
Chen Peter-B29397 writes:
> If the class driver has already mapped this address, the req->req.dma is not
> DMA_ADDR_INVALID either, in this case, the dma_sync_single_for_cpu is
> enough.
ok; forget the patch then.
Thanks
Enrico
___
Linuxppc-dev maili
Hi,
On Thu, Sep 06, 2012 at 04:27:12PM +0200, Enrico Scholz wrote:
> Felipe Balbi writes:
>
> >> > Because the fsl_udc_core driver shares one 'status_req' object for the
> >> > complete ep0 control transfer, it is not possible to prime the final
> >> > STATUS phase immediately after the IN trans
Felipe Balbi writes:
>> > Because the fsl_udc_core driver shares one 'status_req' object for the
>> > complete ep0 control transfer, it is not possible to prime the final
>> > STATUS phase immediately after the IN transaction. E.g. ch9getstatus()
>> > executed:
>> >
>> > | req = udc->status_req
On Wed, Sep 05, 2012 at 02:10:39AM +, Chen Peter-B29397 wrote:
>
> >
> > Because the fsl_udc_core driver shares one 'status_req' object for the
> > complete ep0 control transfer, it is not possible to prime the final
> > STATUS phase immediately after the IN transaction. E.g. ch9getstatus()
Critical exception on 64-bit booke uses user-visible SPRG3 as scratch.
Restore VDSO information in SPRG3 on exception prolog.
Use a common sprg3 field in PACA for all powerpc64 architectures.
Signed-off-by: Mihai Caraman
---
arch/powerpc/include/asm/kvm_book3s_asm.h |1 -
arch/powerpc/includ
> >
> > hstatus = ioread32(hcr_base + HSTATUS);
> >
> > sata_fsl_scr_read(&ap->link, SCR_ERROR, &SError);
> >
> > + /* Read command completed register */
> > + done_mask = ioread32(hcr_base + CC);
> > +
> > + /* Workaround for data length mismatch errata */
> > + if (unlikely(hstatu
Hello.
On 06-09-2012 8:28, Shaohui Xie wrote:
The freescale V2 SATA controller checks if the received data length matches
the programmed length 'ttl', if not, it assumes that this is an error.
In ATAPI, the 'ttl' is based on max allocation length and not the actual
data transfer length, control
On Thu, 6 Sep 2012, Benjamin Herrenschmidt wrote:
> > actually commit 7256a5d2da56 seems to contain the correct PER_LINUX
> > handling, so seems like you picked the right one :)
> >
>
> Odd, they looked different around the use of PER_MASK when I looked but
The original patch had
pers
At 09/06/2012 03:27 PM, andywu106建国 Wrote:
> 2012/9/5
>>
>> From: Wen Congyang
>>
>> hwpoisoned may set when we offline a page by the sysfs interface
>> /sys/devices/system/memory/soft_offline_page or
>> /sys/devices/system/memory/hard_offline_page. If we don't clear
>> this flag when onlining pa
On Thu, Sep 06, 2012 at 05:11:53PM +1000, Stephen Rothwell wrote:
> Hi all,
>
> After merging the final tree, today's linux-next build (powerpc allyesconfig)
> failed like this:
>
> In file included from drivers/atm/fore200e.c:70:0:
> drivers/atm/fore200e.h:263:3: error: redefinition of typedef '
On Thu, Sep 06, 2012 at 12:56:12PM +1000, Benjamin Herrenschmidt wrote:
> On Thu, 2012-09-06 at 10:19 +0800, Fengguang Wu wrote:
> > Hi Ananth,
> >
> > FYI, kernel build failed on
> >
> > tree: git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc.git next
> > head: 8b64a9dfb091f1eca8b7e
2012/9/5
>
> From: Wen Congyang
>
> hwpoisoned may set when we offline a page by the sysfs interface
> /sys/devices/system/memory/soft_offline_page or
> /sys/devices/system/memory/hard_offline_page. If we don't clear
> this flag when onlining pages, this page can't be freed, and will
> not in fre
Hi all,
After merging the final tree, today's linux-next build (powerpc allyesconfig)
failed like this:
In file included from drivers/atm/fore200e.c:70:0:
drivers/atm/fore200e.h:263:3: error: redefinition of typedef 'opcode_t' with
different type
arch/powerpc/include/asm/probes.h:25:13: note: pr
On 2012-8-3 15:49, we...@cn.fujitsu.com wrote:
> From: Yasuaki Ishimatsu
>
> When calling remove_memory_block(), the function shows following message at
> device_release().
>
> Device 'memory528' does not have a release() function, it is broken and must
> be fixed.
>
I found this warning too w
40 matches
Mail list logo
