Hi ,
Thanks for the reply . i will try to share some of my code later .
Looking forward to ur ideas.
Regards,
S.Saravanan
On Fri, Jul 13, 2012 at 6:18 PM, Bounine, Alexandre <
alexandre.boun...@idt.com> wrote:
> This should work. We use similar approach to test our mport HW drivers.**
> *
We only need two examples of CAMP device trees in the upstream kernel.
Co-operative Asymmetric Multi-Processing (CAMP) is a technique where two
or more operating systems (typically multiple copies of the same Linux kernel)
are loaded into memory, and each kernel is given a subset of the available
On Fri, Jun 29, 2012 at 02:47:48PM +0800, Gavin Shan wrote:
> On some powerpc platforms, device BARs need to be assigned to separate
> "segments" of the address space in order for the error isolation and HW
> virtualization mechanisms (EEH) to work properly. Those "segments" have
> a minimum size t
The Freescale P1022 has a unique pin muxing "feature" where the DIU video
controller's video signals are muxed with 24 of the local bus address signals.
When the DIU is enabled, the bulk of the local bus is disabled, preventing
access to memory-mapped devices like NAND flash and the pixis FPGA.
Th
On Jul 12, 2012, at 9:27 PM,
wrote:
> From: Tang Yuantian
>
> Signed-off-by: Tang Yuantian
> ---
> arch/powerpc/boot/dts/p2020rdb-pc_32b.dts |4 ++--
> arch/powerpc/boot/dts/p2020rdb-pc_36b.dts |4 ++--
> 2 files changed, 4 insertions(+), 4 deletions(-)
applied to next
- k
_
On Jul 12, 2012, at 9:27 PM,
wrote:
> From: Tang Yuantian
>
> The following platforms are supported:
> mpc8544, mpc8572, mpc8536, p1021, p1025, p1024, p1010.
>
> Signed-off-by: Tang Yuantian
> ---
> arch/powerpc/sysdev/fsl_85xx_l2ctlr.c | 10 ++
> 1 files changed, 10 insertions(+)
This should work. We use similar approach to test our mport HW drivers.
Alex.
From: Linuxppc-dev
[mailto:linuxppc-dev-bounces+alexandre.bounine=idt@lists.ozlabs.org] On
Behalf Of Saravanan S
Sent: Friday, July 13, 2012 2:16 AM
To: linuxppc-dev@lists.ozlabs.org
Subject: Standalone SRIO Drive
On Jul 13, 2012, at 8:01 AM, Kumar Gala wrote:
> Is the functionality of all of these SDK patches upstream now?
>
> [ ignore commit id's ]
>
> b257909 powerpc/85xx: p1022ds: disable the NAND flash node if video is enabled
> ee260f4 powerpc/mpc85xx: p1022ds support the MTD for NOR and NAND flash
Is the functionality of all of these SDK patches upstream now?
[ ignore commit id's ]
b257909 powerpc/85xx: p1022ds: disable the NAND flash node if video is enabled
ee260f4 powerpc/mpc85xx: p1022ds support the MTD for NOR and NAND flash
4be8bb6 powerpc/mpc85xx: 32bit address support for p1022ds
2
On Jul 13, 2012, at 7:25 AM, Josh Boyer wrote:
> On Fri, Jul 13, 2012 at 7:50 AM, Kumar Gala wrote:
>>
>> On Jul 12, 2012, at 9:44 PM, Jiang Lu wrote:
>>
>>> On PPC44x core, the WRC(Watchdog-timer Reset Control) field of TCR
>>> of timer can not reset by software after set to a non-zero value.
On Jun 26, 2012, at 5:25 AM, Zhao Chenhui wrote:
> From: Li Yang
>
> In sleep PM mode, the clocks of e500 core and unused IP blocks is
> turned off. IP blocks which are allowed to wake up the processor
> are still running.
>
> Some Freescale chips like MPC8536 and P1022 has deep sleep PM mode
On Fri, Jul 13, 2012 at 7:50 AM, Kumar Gala wrote:
>
> On Jul 12, 2012, at 9:44 PM, Jiang Lu wrote:
>
>> On PPC44x core, the WRC(Watchdog-timer Reset Control) field of TCR
>> of timer can not reset by software after set to a non-zero value.
>> Which means software can not reset the timeout behavio
On Jul 3, 2012, at 5:21 AM, Zhao Chenhui wrote:
> From: Li Yang
>
> Add support to disable and re-enable individual cores at runtime
> on MPC85xx/QorIQ SMP machines. Currently support e500v1/e500v2 core.
>
> MPC85xx machines use ePAPR spin-table in boot page for CPU kick-off.
> This patch uses
On 2012-07-12 18:08, Gal Afel wrote:
Hello,
I just got a TWR-MPC8309 from Freescale running Embedded Linux OS. The kernel
version is Linux 2.6.11+pq3 patches and the kernel preconfig file is
linux_2.6.11_mpc8548_cds_def.config.
That's a really OLD kernel, plus it doesn't seem to match your har
On Jul 12, 2012, at 9:44 PM, Jiang Lu wrote:
> On PPC44x core, the WRC(Watchdog-timer Reset Control) field of TCR
> of timer can not reset by software after set to a non-zero value.
> Which means software can not reset the timeout behaviour of watchdog timer.
>
> This patch selects WATCHDOG_NOWA
At 07/09/2012 06:24 PM, Yasuaki Ishimatsu Wrote:
> acpi_memory_device_remove() has been prepared to remove physical memory.
> But, the function only frees acpi_memory_device currentlry.
>
> The patch adds following functions into acpi_memory_device_remove():
> - offline memory
> - remove physi
Hello,
I am looking for a way to configure GPIO initial settings and exports to the
userspace via Sysfs in a generic way via a device tree.
The purpose would be to have the same features as when initializing and
exporting pins via platform code, eg.
static struct gpio leds_gpios[] = {
At 07/09/2012 06:26 PM, Yasuaki Ishimatsu Wrote:
> When (hot)adding memory into system, /sys/firmware/memmap/X/{end, start, type}
> sysfs files are created. But there is no code to remove these files. The patch
> implements the function to remove them.
>
> Note : The code does not free firmware_ma
The iommu pool patch has a bug where it would cause a crash when using
only one pool (based on the size of the DMA window).
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/kernel/iommu.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kernel/iommu.c
On Thu, Jul 12, 2012 at 04:59:12PM -0700, Sukadev Bhattiprolu wrote:
> From: Sukadev Bhattiprolu
> Date: Tue, 3 Jul 2012 13:32:46 -0700
> Subject: [PATCH 1/2] power: Define PV_POWER7P
>
> This change is based on the patch that Carl Love posted to LKML
>
> https://lkml.org/lkml/2012/6/22/30
20 matches
Mail list logo
