How can I verify if the memory mapped is coherent on both cores. My memory
partitioning is given below
CoreBase AddressSize
Core 0 0x, 0x1000, -->
CONFIG_PHYSICAL_START = bootm_low = Base Address
Core 1 0x1000,
On Wednesday 04 January 2012 01:19 AM, Scott Wood wrote:
On 12/28/2011 10:59 PM, Prabhakar Kushwaha wrote:
1) OOB area should be updated irrespective of NAND page size. Earlier it was
updated only for 512byte NAND page.
2) During OOB update fbcr should be equal to OOB size.
Signed-off-by: Poon
On Wednesday 04 January 2012 01:54 AM, Scott Wood wrote:
On 12/28/2011 10:59 PM, Prabhakar Kushwaha wrote:
IFC NAND Machine calculates ECC on 512byte sector. Same is taken care in
fsl_ifc_run_command() while ECC status verification. Here buffer number is
calculated assuming 512byte sector and sa
> -Original Message-
> From: Tabi Timur-B04825
> Sent: Tuesday, January 03, 2012 4:30 AM
> To: Huang Changming-R66093
> Cc: linuxppc-dev@lists.ozlabs.org; Huang Changming-R66093
> Subject: Re: [PATCH] DTS: fix the bug and add the chip compatible for
> eSDHC
>
> On Fri, Dec 23, 2011 at 12
> -Original Message-
> From: Wood Scott-B07421
> Sent: Tuesday, January 03, 2012 2:28 AM
> To: Huang Changming-R66093
> Cc: linuxppc-dev@lists.ozlabs.org; Huang Changming-R66093
> Subject: Re: [PATCH] DTS: fix the bug and add the chip compatible for
> eSDHC
>
> On 12/23/2011 12:10 AM, r6
On 12/27/2011 05:25 AM, Zhao Chenhui wrote:
> * The driver doesn't support MPC8536 Rev 1.0 due to a JOG erratum.
>Subsequent revisions of MPC8536 have corrected the erratum.
Where do you check for this?
> +#define POWMGTCSR_LOSSLESS_MASK 0x0040
> +#define POWMGTCSR_JOG_MASK 0x0020
On 12/28/2011 10:59 PM, Prabhakar Kushwaha wrote:
> IFC NAND Machine calculates ECC on 512byte sector. Same is taken care in
> fsl_ifc_run_command() while ECC status verification. Here buffer number is
> calculated assuming 512byte sector and same is passed to is_blank.
> However in is_blank() buff
On 12/28/2011 10:59 PM, Prabhakar Kushwaha wrote:
> 1) OOB area should be updated irrespective of NAND page size. Earlier it was
> updated only for 512byte NAND page.
>
> 2) During OOB update fbcr should be equal to OOB size.
>
> Signed-off-by: Poonam Aggrwal
> Signed-off-by: Prabhakar Kushwaha
2012/1/3 Michal Nazarewicz :
> On Tue, 03 Jan 2012 15:19:04 +0100, Gilad Ben-Yossef
> wrote:
>>
>> on_each_cpu() returns as its own return value the return value of
>> smp_call_function(). smp_call_function() in turn returns a hard
>> coded value of zero.
>>
>> Some callers to on_each_cpu() waste
on_each_cpu returns the retunr value of smp_call_function
which is hard coded to 0.
Refactor on_each_cpu to a void function and the few callers
that check the return value to save compares and branches.
CC: Michal Nazarewicz
CC: David Airlie
CC: dri-de...@lists.freedesktop.org
CC: Benjamin Herr
on_each_cpu always returns a hard coded return code of zero.
Removing all tests based on this return value saves run time
cycles for compares and code bloat for branches.
CC: Michal Nazarewicz
CC: Benjamin Herrenschmidt
CC: Paul Mackerras
CC: Grant Likely
CC: Rob Herring
CC: linuxppc-dev@lis
on_each_cpu() returns as its own return value the return value of
smp_call_function(). smp_call_function() in turn returns a hard
coded value of zero.
Some callers to on_each_cpu() waste cycles and bloat code space
by checking the return value to on_each_cpu(), probably for
historical reasons.
On 01/03/2012 03:42 AM, Arshad, Farrukh wrote:
> Adding more to it,
>
>
>
> When I write from Core 1 on the shared memory region it is visible at
> Core 0 and it can read what I have written from Core 1 but when I write
> from Core 0 on this shared memory it is not visible on Core 1.
Is the me
On Tue, 03 Jan 2012 15:19:04 +0100, Gilad Ben-Yossef
wrote:
on_each_cpu() returns as its own return value the return value of
smp_call_function(). smp_call_function() in turn returns a hard
coded value of zero.
Some callers to on_each_cpu() waste cycles and bloat code space
by checking the ret
Adding more to it,
When I write from Core 1 on the shared memory region it is visible at Core 0
and it can read what I have written from Core 1 but when I write from Core 0 on
this shared memory it is not visible on Core 1.
Regards,
Farrukh Arshad
From: Arshad, Farrukh
Sent: Tuesday, January 0
15 matches
Mail list logo