If firmware allows us to map all of a partition's memory for DMA on a
particular bridge, create a 1:1 mapping of that memory. Add hooks for
dealing with hotplug events. Dyanmic DMA windows can use larger than the
default page size, and we use the largest one possible.
Not-yet-signed-off-by: Nishan
iommu_table_setparms_lpar needs either the phb or the subbusnumber
(not both), pass the phb to make it similar to iommu_table_setparms.
Note: In cases where a caller was passing bus->number previously to
iommu_table_setparms_lpar() rather than phb->bus->number, this can lead
to a different value i
The device tree root is never a pci bus, and will not have a
PCI_DN(pdn), so the check for PCI_DN added in
650f7b3b2f0ead0673e90452cf3dedde97c537ba makes the check for pdn->parent
redundant and it can be removed.
Signed-off-by: Milton Miller
Signed-off-by: Nishanth Aravamudan
---
arch/powerpc/p
The block in pci_dma_dev_setup_pSeriesLP for dma_window == NULL can be
removed because we will only teminate the loop if we had already allocated
a iommu table for that node or we found a window. While there may be
no window for the device, the intresting part is if we are reusing a
table or creat
Add a function to get the maximum address that can be hotplug added.
This is needed to calculate the size of the tce table needed to cover
all memory in 1:1 mode.
Signed-off-by: Milton Miller
Signed-off-by: Nishanth Aravamudan
---
Comments on where to export?
---
arch/powerpc/include/asm/mmzone
Also add a comment to dev_archdata, indicating that changes there need
to be verified against the driver code.
Signed-off-by: Milton Miller
Signed-off-by: Nishanth Aravamudan
---
arch/powerpc/include/asm/device.h |6 ++
drivers/macintosh/macio_asic.c|7 +++
2 files changed,
The iommu_table pointer in the pci auxiliary struct of device_node has
not been used by the iommu ops since the dma refactor of
12d04eef927bf61328af2c7cbe756c96f98ac3bf, however this code still uses
it to find tables for dlpar. By only setting the PCI_DN iommu_table
pointer on nodes with dma window
The following series, which builds upon the series of cleanups I posted
on 9/15 and 10/18 as "ppc iommu cleanups", enables the pseries firmware
feature dynamic dma windows. This feature will allow future devices to
have a 64-bit DMA mapping covering all memory, coexisting with a smaller
IOMMU windo
On Tue, 26 Oct 2010 16:03:56 +0530
Subrata Modak wrote:
> If you run LTP Memory CGROUP Controller functional test on
> linux-2.6.36-git7, the following Backtrace, OOMKill & rcu_sched_state
> detected stall jiffies are created. The machine is not reachable
> thereafter. Ways to reproduce this prob
MPC8308 has ULPI pin muxing settings in SICRH register, bits 17-18
which is different from both MPC8313 and MPC8315.
Also MPC8308 doesn't have REFSEL, UTMI_PHY_EN and OTG_PORT fields
in the USB DR controller CONTROL register.
Signed-off-by: Ilya Yanok
---
Kim, Kumar,
Please consider including t
Currently completed descriptors are processed in the tasklet. This can
lead to dead lock in case of CONFIG_NET_DMA enabled (new requests are
submitted from softirq context and dma_memcpy_to_iovec() busy loops until
the requests is submitted). To prevent this we should process completed
descriptors
Current code clears interrupt active status _after_ submiting new
transfers. This leaves a possibility of clearing the interrupt for this
new transfer (if it is triggered fast enough) and thus lose this
interrupt. We want to clear interrupt active status _before_ new
transfers is submited and for c
Hello everybody,
meanwhile I've fixed one more issue in mpc512x_dma driver.
Any comments? Anybody interrested in this driver? Piotr?
Still unsure how to deal with bitfield structures in IO space...
Regards, Ilya.
Signed-off-by: Ilya Yanok
Cc: Piotr Ziecik
___
MPC8308 has DMA controller compatible with mpc512x_dma driver. This
patch adds device-tree node to support DMA controller on MPC8308RDB
board.
Signed-off-by: Ilya Yanok
---
arch/powerpc/boot/dts/mpc8308rdb.dts |8
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/arch/p
MPC8308 has DMA controller compatible with mpc512x_dma driver. This
patch adds device-tree node to support DMA controller on MPC8308 P1M
board.
Signed-off-by: Ilya Yanok
---
arch/powerpc/boot/dts/mpc8308_p1m.dts |8
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/arch
MPC8308 has pretty much the same DMA controller as MPC5121 and
this patch adds support for MPC8308 to the mpc512x_dma driver.
Signed-off-by: Ilya Yanok
Cc: Piotr Ziecik
---
drivers/dma/Kconfig |2 +-
drivers/dma/mpc512x_dma.c | 95 +---
2 file
While testing mpc512x-dma driver with dmatest module I've found that
I can hang the mpc512x-dma issueing request from multiple threads to
the single channel.
(insmod dmatest.ko max_channels=1 threads_per_chan=16)
After investingating this case I've managed to find that this happens
if and only if w
There are two identical implementations of of_get_mac_address(), one
each in arch/powerpc/kernel/prom_parse.c and
arch/microblaze/kernel/prom_parse.c. Move this function to a new
common file of_net.{c,h} and adjust all the callers to include the new
header.
Signed-off-by: David Daney
Cc: Michal
Micha Nelissen wrote:
>
> In various parts of the enumeration and routing algorithm, it would
need
> to lookup the tag to find the destid, if the destid is in the tag then
> this lookup is not needed.
Let's keep this discussion within limits of the current implementation.
Existing method of form
Bounine, Alexandre wrote:
Micha Nelissen wrote:
I look at it this way: it prevents the need for another layer of
indirection: translating component tag to a destid.
The destid alone is not enough. You will need an entire rio_dev object
for that device anyway.
?? I did not say a rio_dev obje
Micha Nelissen wrote:
>
> I look at it this way: it prevents the need for another layer of
> indirection: translating component tag to a destid.
The destid alone is not enough. You will need an entire rio_dev object
for that device anyway.
>
> Why no relation? My experience is that during debu
PT7C4338 chip is being manufactured by Pericom Technology Inc.
It is a serial real-time clock which provides:
1)Low-power clock/calendar.
2)Programmable square-wave output.
It has 56 bytes of nonvolatile RAM.
Signed-off-by: Priyanka Jain
---
PT7C4338 RTC driver is verified on Freescale P1010RDB.
Dear Kumar,
As there is no feedback on this patch. Please pull this upstream.
Thanks
Priyanka
-Original Message-
From: Jain Priyanka-B32167
Sent: Monday, October 25, 2010 1:39 PM
To: linuxppc-...@ozlabs.org
Cc: Jain Priyanka-B32167
Subject: [PATCH][v0] RTC driver(Linux) for PT7C4338 chi
On Oct 25, 2010, at 3:08 AM, Priyanka Jain wrote:
> PT7C4338 chip is manufactured by Pericom Technology Inc.
> It is a serial real-time clock which provides:
> 1)Low-power clock/calendar.
> 2)Programmable square-wave output.
> It has 56 bytes of nonvolatile RAM.
>
> Freescale P1010RDB uses PT7C4
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