Hello,
On Thu, Jul 29, 2010 at 11:40:21PM -0700, Shawn Jin wrote:
> Hi,
>
> Which microcode patch should be selected for MPC870? In the old 2.4
> kernel, the CONFIG_UCODE_PATCH was selected. What's the corresponding
> config: CONFIG_USB_SOF_UCODE_PATCH or CONFIG_I2C_SPI_UCODE_PATCH or
> CONFIG_I2
Hi,
Which microcode patch should be selected for MPC870? In the old 2.4
kernel, the CONFIG_UCODE_PATCH was selected. What's the corresponding
config: CONFIG_USB_SOF_UCODE_PATCH or CONFIG_I2C_SPI_UCODE_PATCH or
CONFIG_I2C_SPI_SMC1_UCODE_PATCH? Since my board doesn't have USB, I
believe USB microcod
When CPU hotplug is used, some CPUs may be offline at the time a kexec is
performed. The subsequent kernel may expect these CPUs to be already running,
and will declare them stuck. On pseries, there's also a soft-offline (cede)
state that CPUs may be in; this can also cause problems as the kexece
Tidies some typos, KERN_INFO-ise an info msg, and add a debug msg showing
when the final sequence starts.
Also adds a comment to kexec_prepare_cpus_wait() to make note of a possible
problem; the need for kexec to deal with CPUs that failed to originally start
up.
Signed-off-by: Matt Evans
---
a
Separated tidyup comments & debug away from the fix of restarting offline
available CPUs before waiting for them on kexec.
Matt Evans (2):
powerpc/kexec: Add to and tidy debug/comments in machine_kexec64.c
powerpc/kexec: Fix orphaned offline CPUs across kexec
arch/powerpc/kernel/machine_kex
P4080 ESDHC controller does not support 1.8V and 3.0V voltage. but the
host controller capabilities register wrongly set the bits.
This patch adds the workaround to correct the weird voltage setting bits.
Signed-off-by: Roy Zang
---
This is the second version of patch
http://patchwork.ozlabs.org
On Fri, Jul 30, 2010 at 01:15:14PM +1000, Michael Neuling wrote:
> (adding kexec list to CC)
>
> In message <4c521fd2.4050...@ozlabs.org> you wrote:
> > Michael Neuling wrote:
> > > In message <4c511216.30...@ozlabs.org> you wrote:
> > >> When CPU hotplug is used, some CPUs may be offline at the t
On Thu, Jul 29, 2010 at 07:02:44PM -0700, Feng Kan wrote:
> On Thu, Jul 29, 2010 at 6:26 PM, Greg KH wrote:
> > On Thu, Jul 29, 2010 at 06:19:25PM -0700, Feng Kan wrote:
> >> Hi Greg:
> >>
> >> On Thu, Jul 29, 2010 at 5:50 PM, Greg KH wrote:
> >> > On Thu, Jul 29, 2010 at 05:14:59PM -0700, Feng K
(adding kexec list to CC)
In message <4c521fd2.4050...@ozlabs.org> you wrote:
> Michael Neuling wrote:
> > In message <4c511216.30...@ozlabs.org> you wrote:
> >> When CPU hotplug is used, some CPUs may be offline at the time a kexec is
> >> performed. The subsequent kernel may expect these CPUs t
On Thu, Jul 29, 2010 at 6:26 PM, Greg KH wrote:
> On Thu, Jul 29, 2010 at 06:19:25PM -0700, Feng Kan wrote:
>> Hi Greg:
>>
>> On Thu, Jul 29, 2010 at 5:50 PM, Greg KH wrote:
>> > On Thu, Jul 29, 2010 at 05:14:59PM -0700, Feng Kan wrote:
>> >> Hi Greg:
>> >>
>> >> We will change to a BSD 3 clause
On Thu, Jul 15, 2010 at 01:18:21PM -0600, Grant Likely wrote:
> On Thu, Jul 15, 2010 at 12:58 PM, Matthew McClintock
> wrote:
> > On Thu, 2010-07-15 at 12:37 -0600, Grant Likely wrote:
> >> On Thu, Jul 15, 2010 at 12:03 PM, Matthew McClintock
> >> wrote:
> >> > Yes. Where would we get a list of
On Thu, Jul 15, 2010 at 11:39:21AM -0500, Matthew McClintock wrote:
> On Thu, 2010-07-15 at 10:22 -0600, Grant Likely wrote:
> > > Thanks for taking a look. My first thought was to just blow away all
> > the
> > > memreserve regions and start over. But, there are reserve regions
> > for
> > > other
On Thu, Jul 29, 2010 at 06:19:25PM -0700, Feng Kan wrote:
> Hi Greg:
>
> On Thu, Jul 29, 2010 at 5:50 PM, Greg KH wrote:
> > On Thu, Jul 29, 2010 at 05:14:59PM -0700, Feng Kan wrote:
> >> Hi Greg:
> >>
> >> We will change to a BSD 3 clause license header. Our legal counsel is
> >> talking to Syno
Hi Greg:
On Thu, Jul 29, 2010 at 5:50 PM, Greg KH wrote:
> On Thu, Jul 29, 2010 at 05:14:59PM -0700, Feng Kan wrote:
>> Hi Greg:
>>
>> We will change to a BSD 3 clause license header. Our legal counsel is
>> talking to Synopsis to make this change.
>
> Why BSD? You do realize what that means whe
On Thu, Jul 29, 2010 at 05:14:59PM -0700, Feng Kan wrote:
> Hi Greg:
>
> We will change to a BSD 3 clause license header. Our legal counsel is
> talking to Synopsis to make this change.
Why BSD? You do realize what that means when combined within the body
of the kernel, right?
Are you going to
On 07/28/2010 05:28 PM, Fushen Chen wrote:
[PATCH 1/2 v1.04]
.
.
.
PATCH 1/2 seems to not have made it to linux-...@vger.kernel.org. I
suspect that a spam filter got it.
Could you remove whatever there is in the patch that triggers the
filter? Or failing that, change the filter so we can
Michael Neuling wrote:
> In message <4c511216.30...@ozlabs.org> you wrote:
>> When CPU hotplug is used, some CPUs may be offline at the time a kexec is
>> performed. The subsequent kernel may expect these CPUs to be already running
> ,
>> and will declare them stuck. On pseries, there's also a so
Hi Greg:
We will change to a BSD 3 clause license header. Our legal counsel is
talking to Synopsis to make this change. We will resubmit once this
is in place. Please let me know if you have any additional concerns.
Feng Kan
Applied Micro
On Mon, Jul 26, 2010 at 4:16 PM, Greg KH wrote:
> On Mon
In message <4c511216.30...@ozlabs.org> you wrote:
> When CPU hotplug is used, some CPUs may be offline at the time a kexec is
> performed. The subsequent kernel may expect these CPUs to be already running
,
> and will declare them stuck. On pseries, there's also a soft-offline (cede)
> state th
Dear Kumar & Kim,
any comments on this issue?
Thanks.
In message <4c48b384.1020...@emcraft.com> Ilya Yanok wrote:
> Hi Kumar, Kim, Josh, everybody,
>
> I hope to disturb you but I haven't got any reply for my first posting...
>
> I've found that MSI work correctly with older kernels on my MP
This patch moves the declaration of of_get_address(), of_get_pci_address(),
and of_pci_address_to_resource() out of arch code and into the common
linux/of_address header file.
This patch also fixes some of the asm/prom.h ordering issues. It still
includes some header files that it ideally shouldn
of_node_to_nid() is only relevant in a few architectures. Don't force
everyone to implement it anyway.
Signed-off-by: Grant Likely
---
v3: make -1 the default return value and let powerpc override it to 0 when
CONFIG_NUMA not set.
arch/microblaze/include/asm/topology.h | 10 --
arch
> [PATCH 1/2 v1.04]
> 1. License information is under clarification.
I meant that APM is still working with Synopys to resolve the GPL License.
There is no result yet.
I'll change this line to "License issue is resolved." if that happens.
I modified other part of the patch according to other revie
On Thu, Jul 29, 2010 at 09:26:12AM -0700, Fushen Chen wrote:
> > [PATCH 1/2 v1.04]
> > 1. License information is under clarification.
>
> I meant that APM is still working with Synopys to resolve the GPL License.
> There is no result yet.
Then I would be very careful in posting the code like you
On Wed, Jul 28, 2010 at 10:09:24PM -0700, Guenter Roeck wrote:
> Signed-off-by: Guenter Roeck
Acked-by: Mark Brown
___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev
On Jul 29, 2010, at 3:33 AM, Simon Horman wrote:
> On Tue, Jul 20, 2010 at 03:14:58PM -0500, Matthew McClintock wrote:
>> This fixes --reuseinitrd and --ramdisk option for ppc32 on
>> uImage-ppc and Elf. It works for normal kexec as well as for
>> kdump.
>>
>> When using --reuseinitrd you need t
On Book3S KVM we directly expose some asm pointers to C code as
variables. These need to be relocated and thus break on relocatable
kernels.
To make sure we can at least build, let's mark them as long instead
of u32 where 64bit relocations don't work.
This fixes the following build error:
WARNIN
During the past few weeks a couple of fixes have gathered in my queue. This
is a dump of everything that is not related to the PV framework.
Please apply on top of the PV stuff.
Alexander Graf (6):
KVM: PPC: Book3S_32 MMU debug compile fixes
KVM: PPC: RCU'ify the Book3s MMU
KVM: PPC: Add bo
From: Gleb Natapov
On failure gfn_to_pfn returns bad_page so use correct function to check
for that.
Signed-off-by: Gleb Natapov
Signed-off-by: Alexander Graf
---
arch/powerpc/kvm/book3s_32_mmu_host.c |2 +-
arch/powerpc/kvm/book3s_64_mmu_host.c |2 +-
2 files changed, 2 insertions(+)
So far we've been running all code without locking of any sort. This wasn't
really an issue because I didn't see any parallel access to the shadow MMU
code coming.
But then I started to implement dirty bitmapping to MOL which has the video
code in its own thread, so suddenly we had the dirty bitma
Book3S_32 requires MSR_DR to be disabled during load_up_xxx while on Book3S_64
it's supposed to be enabled. I misread the code and disabled it in both cases,
potentially breaking the PS3 which has a really small RMA.
This patch makes KVM work on the PS3 again.
Signed-off-by: Alexander Graf
---
On Book3s_32 the tlbie instruction flushed effective addresses by the mask
0x0000. This is pretty hard to reflect with a hash that hashes ~0xfff, so
to speed up that target we should also keep a special hash around for it.
Signed-off-by: Alexander Graf
---
arch/powerpc/include/asm/kvm_host.h
When using a relocatable kernel we need to make sure that the trampline code
and the interrupt handlers are both copied to low memory. The only way to do
this reliably is to put them in the copied section.
This patch should make relocated kernels work with KVM.
KVM-Stable-Tag
Signed-off-by: Alexa
Due to previous changes, the Book3S_32 guest MMU code didn't compile properly
when enabling debugging.
This patch repairs the broken code paths, making it possible to define DEBUG_MMU
and friends again.
Signed-off-by: Alexander Graf
---
arch/powerpc/kvm/book3s_32_mmu.c |4 ++--
1 files chan
On BookE the preferred way to write the EE bit is the wrteei instruction. It
already encodes the EE bit in the instruction.
So in order to get BookE some speedups as well, let's also PV'nize thati
instruction.
Signed-off-by: Alexander Graf
---
v1 -> v2:
- use kvm_patch_ins_b
---
arch/power
We need to override EA as well as PA lookups for the magic page. When the guest
tells us to project it, the magic page overrides any guest mappings.
In order to reflect that, we need to hook into all the MMU layers of KVM to
force map the magic page if necessary.
Signed-off-by: Alexander Graf
-
The PowerPC ISA has a special instruction for mtmsr that only changes the EE
and RI bits, namely the L=1 form.
Since that one is reasonably often occuring and simple to implement, let's
go with this first. Writing EE=0 is always just a store. Doing EE=1 also
requires us to check for pending interr
We have all the hypervisor pieces in place now, but the guest parts are still
missing.
This patch implements basic awareness of KVM when running Linux as guest. It
doesn't do anything with it yet though.
Signed-off-by: Alexander Graf
---
v2 -> v3:
- Add hypercall stub
---
arch/powerpc/kern
With our current MMU scheme we don't need to know about the tlbsync instruction.
So we can just nop it out.
Signed-off-by: Alexander Graf
---
v1 -> v2:
- use kvm_patch_ins
---
arch/powerpc/kernel/kvm.c | 12
1 files changed, 12 insertions(+), 0 deletions(-)
diff --git a/arch
When we hook an instruction we need to make sure we don't clobber any of
the registers at that point. So we write them out to scratch space in the
magic page. To make sure we don't fall into a race with another piece of
hooked code, we need to disable interrupts.
To make the later patches and code
We just introduced a new PV interface that screams for documentation. So here
it is - a shiny new and awesome text file describing the internal works of
the PPC KVM paravirtual interface.
Signed-off-by: Alexander Graf
---
v1 -> v2:
- clarify guest implementation
- clarify that privileged i
We need to tell the guest the opcodes that make up a hypercall through
interfaces that are controlled by userspace. So we need to add a call
for userspace to allow it to query those opcodes so it can pass them
on.
This is required because the hypercall opcodes can change based on
the hypervisor co
There is also a form of mtmsr where all bits need to be addressed. While the
PPC64 Linux kernel behaves resonably well here, on PPC32 we do not have an
L=1 form. It does mtmsr even for simple things like only changing EE.
So we need to hook into that one as well and check for a mask of bits that w
We will need to patch several instruction streams over to a different
code path, so we need a way to patch a single instruction with a branch
somewhere else.
This patch adds a helper to facilitate this patching.
Signed-off-by: Alexander Graf
---
v2 -> v3:
- add safety check for relocatable
The DSISR register contains information about a data page fault. It is fully
read/write from inside the guest context and we don't need to worry about
interacting based on writes of this register.
This patch converts all users of the current field to the shared page.
Signed-off-by: Alexander Graf
To communicate with KVM directly we need to plumb some sort of interface
between the guest and KVM. Usually those interfaces use hypercalls.
This hypercall implementation is described in the last patch of the series
in a special documentation file. Please read that for further information.
This p
The SRR0 and SRR1 registers contain cached values of the PC and MSR
respectively. They get written to by the hypervisor when an interrupt
occurs or directly by the kernel. They are also used to tell the rfi(d)
instruction where to jump to.
Because it only gets touched on defined events that, it's
Some instructions can simply be replaced by load and store instructions to
or from the magic page.
This patch replaces often called instructions that fall into the above category.
Signed-off-by: Alexander Graf
---
v1 -> v2:
- use kvm_patch_ins
---
arch/powerpc/kernel/kvm.c | 109 +
The DAR register contains the address a data page fault occured at. This
register behaves pretty much like a simple data storage register that gets
written to on data faults. There is no hypervisor interaction required on
read or write.
This patch converts all users of the current field to the sha
Currently x86 is the only architecture that uses kvm_guest_init(). With
PowerPC we're getting a second user, but the signature is different there
and we don't need to export it, as it uses the normal kernel init framework.
So let's move the x86 specific definition of that function over to the x86
On PowerPC it's very normal to not support all of the physical RAM in real mode.
To check if we're matching on the shared page or not, we need to know the limits
so we can restrain ourselves to that range.
So let's make it a define instead of open-coding it. And while at it, let's also
increase it
While running in hooked code we need to store register contents out because
we must not clobber any registers.
So let's add some fields to the shared page we can just happily write to.
Signed-off-by: Alexander Graf
---
arch/powerpc/include/asm/kvm_para.h |3 +++
1 files changed, 3 insertion
We will soon require more sophisticated methods to replace single instructions
with multiple instructions. We do that by branching to a memory region where we
write replacement code for the instruction to.
This region needs to be within 32 MB of the patched instruction though, because
that's the f
When the guest turns on interrupts again, it needs to know if we have an
interrupt pending for it. Because if so, it should rather get out of guest
context and get the interrupt.
So we introduce a new field in the shared page that we use to tell the guest
that there's a pending interrupt lying aro
We will soon start and replace instructions from the text section with
other, paravirtualized versions. To ease the readability of those patches
I split out the generic looping and magic page mapping code out.
This patch still only contains stubs. But at least it loops through the
text section :).
We will be introducing a method to project the shared page in guest context.
As soon as we're talking about this coupling, the shared page is colled magic
page.
This patch introduces simple defines, so the follow-up patches are easier to
read.
Signed-off-by: Alexander Graf
---
arch/powerpc/incl
Now that we have the shared page in place and the MMU code knows about
the magic page, we can expose that capability to the guest!
Signed-off-by: Alexander Graf
---
v2 -> v3:
- align hypercalls to in/out of ePAPR
---
arch/powerpc/include/asm/kvm_para.h |2 ++
arch/powerpc/kvm/powerpc.c
One of the most obvious registers to share with the guest directly is the
MSR. The MSR contains the "interrupts enabled" flag which the guest has to
toggle in critical sections.
So in order to bring the overhead of interrupt en- and disabling down, let's
put msr into the shared page. Keep in mind
When in kernel mode there are 4 additional registers available that are
simple data storage. Instead of exiting to the hypervisor to read and
write those, we can just share them with the guest using the page.
This patch converts all users of the current field to the shared page.
Signed-off-by: Al
For transparent variable sharing between the hypervisor and guest, I introduce
a shared page. This shared page will contain all the registers the guest can
read and write safely without exiting guest context.
This patch only implements the stubs required for the basic structure of the
shared page.
When running in hooked code we need a way to disable interrupts without
clobbering any interrupts or exiting out to the hypervisor.
To achieve this, we have an additional critical field in the shared page. If
that field is equal to the r1 register of the guest, it tells the hypervisor
that we're i
On PPC we run PR=0 (kernel mode) code in PR=1 (user mode) and don't use the
hypervisor extensions.
While that is all great to show that virtualization is possible, there are
quite some cases where the emulation overhead of privileged instructions is
killing performance.
This patchset tackles exac
Hi Sven,
> I am using a PowerPC MPC5200 from Freescale (with STK5200-Board), ELDK 4.2
> from DENX and the Kernel 2.6.34-rc5.
>
> My Kernel is running fine. The console output is coming over the device
> ttyPSC0.
>
> In future I want to login over telnet. So I deactivated the Kerneloption
> to outp
Hi Grant,
> On Fri, Jul 23, 2010 at 8:00 AM, Anatolij Gustschin wrote:
>> On MPC5121e Rev 2.0 re-configuring the DIU area descriptor
>> by writing new descriptor address doesn't always work.
>> As a result, DIU continues to display using old area descriptor
>> even if the new one has been written
kw_i2c_irq and via_pmu_interrupt are not timer interrupts and
therefore should not use IRQF_TIMER. Use the recently introduced
IRQF_NO_SUSPEND instead since that is the actual desired behaviour.
Signed-off-by: Ian Campbell
Cc: Thomas Gleixner
Cc: Benjamin Herrenschmidt
Cc: Paul Mackerras
Cc: G
A small number of users of IRQF_TIMER are using it for the implied no
suspend behaviour on interrupts which are not timer interrupts.
Therefore add a new IRQF_NO_SUSPEND flag, rename IRQF_TIMER to
__IRQF_TIMER and redefine IRQF_TIMER in terms of these new flags.
Signed-off-by: Ian Campbell
Cc: T
On Thu, 2010-07-29 at 09:49 +0100, Thomas Gleixner wrote:
> On Wed, 28 Jul 2010, Ian Campbell wrote:
>
> > Continue to provide IRQF_TIMER as an alias to IRQF_NO_SUSPEND since I
> > think it is worth preserving the nice self-documenting name (where it
> > is used appropriately). It also avoid needi
On Mon, Jul 26, 2010 at 11:22:58PM -0500, Matthew McClintock wrote:
>
> On Jul 26, 2010, at 9:55 PM, Simon Horman wrote:
>
> > [Cced linuxppc-dev]
> >
> > On Tue, Jul 20, 2010 at 11:42:57PM -0500, Matthew McClintock wrote:
> >> This patch series adds full support for booting with a flat device t
On Thu, 2010-07-29 at 09:49 +0100, Thomas Gleixner wrote:
> On Wed, 28 Jul 2010, Ian Campbell wrote:
>
> > Continue to provide IRQF_TIMER as an alias to IRQF_NO_SUSPEND since I
> > think it is worth preserving the nice self-documenting name (where it
> > is used appropriately). It also avoid needi
On Wed, 28 Jul 2010, Ian Campbell wrote:
> Continue to provide IRQF_TIMER as an alias to IRQF_NO_SUSPEND since I
> think it is worth preserving the nice self-documenting name (where it
> is used appropriately). It also avoid needing to patch all the many
> users who are using the flag for an actua
On Tue, Jul 20, 2010 at 03:14:58PM -0500, Matthew McClintock wrote:
> This fixes --reuseinitrd and --ramdisk option for ppc32 on
> uImage-ppc and Elf. It works for normal kexec as well as for
> kdump.
>
> When using --reuseinitrd you need to specifify retain_initrd
> on the command line. Also, if
On Wed, Jul 28, 2010 at 10:09 PM, Guenter Roeck
wrote:
> The following comment is found in include/linux/sysfs.h:
>
> /* FIXME
> * The *owner field is no longer used.
> * x86 tree has been cleaned up. The owner
> * attribute is still left for other arches.
> */
>
> As it turns out, t
Hi Simon,
Thanks for the quick reply. One more thing I want to ask is what if I create
a dma pool (using pci_pool_create()), allocate dma buffers from that pool
and then try to memory map them? will the buffers in that case will be
continuous and is it possible to memory map them in a single user
local...@f0010100 {
ranges = <
0 0 FC00 100
2 0 FA00 100
1 0 7000 100
>;
fl...@0,0{
On Thu, 29 Jul 2010 01:19:23 -0600
Grant Likely wrote:
> On Wed, Jul 7, 2010 at 5:28 AM, Peter Korsgaard wrote:
> >> "Anatolij" == Anatolij Gustschin writes:
> >
> > Hi,
> >
> > Old mail, I know ..
> >
> > Anatolij> From: Matthias Fuchs
> > Anatolij> This patch adds a gpio driver for MPC
On Thu, Jul 29, 2010 at 12:08 AM, hacklu wrote:
> local...@f0010100 {
>
> ranges = <
> 0 0 FC00 100
> 2 0 FA00 100
> 1 0 7000 100
>
On Wed, Jul 7, 2010 at 5:28 AM, Peter Korsgaard wrote:
>> "Anatolij" == Anatolij Gustschin writes:
>
> Hi,
>
> Old mail, I know ..
>
> Anatolij> From: Matthias Fuchs
> Anatolij> This patch adds a gpio driver for MPC512X PowerPCs.
>
> Anatolij> It has been tested on our CAN-CBX-CPU5201 mod
77 matches
Mail list logo
