Re: [Evolves!] Why does one "stw" fail with address translation disabled in PPC405EP?

2008-08-31 Thread Zhou Rui
在 2008-09-01一的 15:42 +1000,Benjamin Herrenschmidt写道: > On Sun, 2008-08-31 at 13:50 +0200, Zhou Rui wrote: > > Hi, all: > > My problem seems basically solved. > > We we used to call vmalloc() in the memory management part of our > > source, but it seems to be the key unreliable point result

Re: Efficient memcpy()/memmove() for G2/G3 cores...

2008-08-31 Thread David Jander
On Sunday 31 August 2008 10:28:43 Benjamin Herrenschmidt wrote: > O> > It would be useful of somebody interested in getting things things > > > > > into glibc did the necessary FSF copyright assignment stuff and > > > > worked toward integrating them. > > > > > > Ben makes a very good point! > > >

Re: [Evolves!] Why does one "stw" fail with address translation disabled in PPC405EP?

2008-08-31 Thread Benjamin Herrenschmidt
On Sun, 2008-08-31 at 13:50 +0200, Zhou Rui wrote: > Hi, all: > My problem seems basically solved. > We we used to call vmalloc() in the memory management part of our > source, but it seems to be the key unreliable point resulting in the > problem. vmalloc() always assigns some virtual addr

Re: [PATCH v2] POWERPC: Allow 32-bit pgtable code to support 36-bit physical

2008-08-31 Thread Benjamin Herrenschmidt
> Could the stw to the same reservation granule as the stwcx cancel the > reservation on some implementations? It might I suppose ... In any case, see my replies to Becky. > Plus, if you're assuming that the > entry is currently invalid and all callers have the page table lock, do > we need

Re: [PATCH v2] POWERPC: Allow 32-bit pgtable code to support 36-bit physical

2008-08-31 Thread Benjamin Herrenschmidt
> +#ifdef CONFIG_PTE_64BIT > +#define PTE_FLAGS_OFFSET 4 /* offset of PTE flags, in bytes */ > +#define LNX_PTE_SIZE 8 /* size of a linux PTE, in bytes */ > +#else > +#define PTE_FLAGS_OFFSET 0 > +#define LNX_PTE_SIZE 4 > +#endif s/LNX_PTE_SIZE/PTE_BYTES or PTE

Re: [PATCH] prevent powerpc from invoking irq handlers on offline CPUs

2008-08-31 Thread Paul E. McKenney
On Mon, Sep 01, 2008 at 01:14:40PM +1000, Benjamin Herrenschmidt wrote: > On Sun, 2008-08-31 at 19:06 -0700, Paul E. McKenney wrote: > > On Mon, Sep 01, 2008 at 10:34:44AM +1000, Benjamin Herrenschmidt wrote: > > > On Sun, 2008-08-31 at 10:31 -0700, Paul E. McKenney wrote: > > > > Make powerpc refr

interrupting gpios on mpc5200

2008-08-31 Thread Jon Smirl
How do I use an interrupting gpio with this new gpiolib support for the mpc5200? gpio_to_irq() doesn't appear to be implemented. If you can outline for me how it is supposed to be hooked up I can work on it. -- Jon Smirl [EMAIL PROTECTED] ___ Linuxppc

Re: [PATCH] prevent powerpc from invoking irq handlers on offline CPUs

2008-08-31 Thread Benjamin Herrenschmidt
On Sun, 2008-08-31 at 19:06 -0700, Paul E. McKenney wrote: > On Mon, Sep 01, 2008 at 10:34:44AM +1000, Benjamin Herrenschmidt wrote: > > On Sun, 2008-08-31 at 10:31 -0700, Paul E. McKenney wrote: > > > Make powerpc refrain from clearing a given to-be-offlined CPU's bit in the > > > cpu_online_mask

Re: [PATCH] powerpc: use sys_pause for 32bit pause entry point

2008-08-31 Thread Stephen Rothwell
On Mon, 1 Sep 2008 03:23:30 +0200 Christoph Hellwig <[EMAIL PROTECTED]> wrote: > > sys32_pause is a useless copy of the generic sys_pause. > > > Signed-off-by: Christoph Hellwig <[EMAIL PROTECTED]> Acked-by: Stephen Rothwell <[EMAIL PROTECTED]> -- Cheers, Stephen Rothwell[E

Re: [PATCH] prevent powerpc from invoking irq handlers on offline CPUs

2008-08-31 Thread Paul E. McKenney
On Mon, Sep 01, 2008 at 10:34:44AM +1000, Benjamin Herrenschmidt wrote: > On Sun, 2008-08-31 at 10:31 -0700, Paul E. McKenney wrote: > > Make powerpc refrain from clearing a given to-be-offlined CPU's bit in the > > cpu_online_mask until it has processed pending irqs. This change > > prevents othe

[PATCH] powerpc: use sys_pause for 32bit pause entry point

2008-08-31 Thread Christoph Hellwig
sys32_pause is a useless copy of the generic sys_pause. Signed-off-by: Christoph Hellwig <[EMAIL PROTECTED]> Index: linux-2.6/arch/powerpc/include/asm/systbl.h === --- linux-2.6.orig/arch/powerpc/include/asm/systbl.h2008-08-22

Re: [PATCH] ppc4xx_pci: necessary fixes for 4GB RAM size

2008-08-31 Thread Benjamin Herrenschmidt
On Thu, 2008-08-28 at 09:28 -0400, Josh Boyer wrote: > On Fri, 22 Aug 2008 11:43:35 +0400 > Ilya Yanok <[EMAIL PROTECTED]> wrote: > > > 1. total_memory should be phys_addr_t not unsigned long > > 2. is_power_of_2() works with u32 so I just inlined (size & (size-1)) != 0 > > instead. > > Also this

Re: [PATCH] prevent powerpc from invoking irq handlers on offline CPUs

2008-08-31 Thread Benjamin Herrenschmidt
On Sun, 2008-08-31 at 10:31 -0700, Paul E. McKenney wrote: > Make powerpc refrain from clearing a given to-be-offlined CPU's bit in the > cpu_online_mask until it has processed pending irqs. This change > prevents other CPUs from being blindsided by an apparently offline CPU > nevertheless changin

Re: [PATCH] ibm_newemac: MAL[12]_IER_EVENTS definition: 2x *_OTE -> *_DE

2008-08-31 Thread Benjamin Herrenschmidt
On Sat, 2008-08-30 at 22:48 +0200, roel kluin wrote: > MAL[12]_IER_EVENTS definitions have MAL_IER_OTE twice > but lack MAL_IER_DE > > Signed-off-by: Roel Kluin <[EMAIL PROTECTED]> Thanks. > --- > drivers/net/ibm_newemac/mal.h |4 ++-- > 1 files changed, 2 insertions(+), 2 deletions(-) > >

[PATCH] prevent powerpc from invoking irq handlers on offline CPUs

2008-08-31 Thread Paul E. McKenney
Make powerpc refrain from clearing a given to-be-offlined CPU's bit in the cpu_online_mask until it has processed pending irqs. This change prevents other CPUs from being blindsided by an apparently offline CPU nevertheless changing globally visible state. Signed-off-by: Paul E. McKenney <[EMAIL

Re: [Evolves!] Why does one "stw" fail with address translation disabled in PPC405EP?

2008-08-31 Thread Zhou Rui
Hi, all: My problem seems basically solved. We we used to call vmalloc() in the memory management part of our source, but it seems to be the key unreliable point resulting in the problem. vmalloc() always assigns some virtual addresses whose corresponding physical addresses are out of memor

Re: Efficient memcpy()/memmove() for G2/G3 cores...

2008-08-31 Thread Benjamin Herrenschmidt
O> > It would be useful of somebody interested in getting things things > > > into glibc did the necessary FSF copyright assignment stuff and worked > > > toward integrating them. > > > > Ben makes a very good point! > > Sounds reasonable... but I am still wondering about what you mean > with "th

Re: [PATCH v2] POWERPC: Allow 32-bit pgtable code to support 36-bit physical

2008-08-31 Thread Benjamin Herrenschmidt
On Sat, 2008-08-30 at 11:24 -0500, Scott Wood wrote: > On Fri, Aug 29, 2008 at 08:42:01AM +1000, Benjamin Herrenschmidt wrote: > > For the non-SMP case, I think it should be possible to optimize it. The > > only thing that can happen at interrupt time is hashing of kernel or > > vmalloc/ioremap pag