Here is a program that takes a PReP residual blob as input and
generates a device tree as output. Currently the back-end uses printf
to output the tree in dts format, but it would be easy to do an
alternative back-end that outputs a dtb. The idea is that this will
end up in the wrapper (with a dt
Update iommu_alloc() to take the struct dma_attrs and pass them on to
tce_build(). This change propagates down to the tce_build functions of
all the platforms.
Signed-off-by: Mark Nelson <[EMAIL PROTECTED]>
---
arch/powerpc/kernel/iommu.c| 13 -
arch/powerpc/platforms/ce
Introduce a new dma attriblue DMA_ATTR_STRONG_ORDERING to use strong ordering
on DMA mappings in the Cell processor. Add the code to the Cell's IOMMU
implementation to use this.
The current Cell IOMMU implementation sets the IOPTE_SO_RW bits in all IOTPEs
(for both the dynamic and fixed mappings)
Move device_to_mask() to dma-mapping.h because we need to use it from
outside dma_64.c in a later patch.
Signed-off-by: Mark Nelson <[EMAIL PROTECTED]>
---
arch/powerpc/kernel/dma_64.c |9 -
include/asm-powerpc/dma-mapping.h |9 +
2 files changed, 9 insertions(+), 9 d
Make cell_dma_dev_setup_iommu() return a pointer to the struct iommu_table
(or NULL if no table can be found) rather than putting this pointer into
dev->archdata.dma_data (let the caller do that), and rename this function
to cell_get_iommu_table() to reflect this change.
This will allow us to get
Update powerpc to use the new dma_*map*_attrs() interfaces. In doing so
update struct dma_mapping_ops to accept a struct dma_attrs and propagate
these changes through to all users of the code (generic IOMMU and the
64bit DMA code, and the iseries and ps3 platform code).
The old dma_*map_*() interf
--
This is a resend of the patchset sent out on 2008-05-01 titled
"Implement dma_*map*_attrs() and DMA_ATTR_WEAK_ORDERING, use on Cell".
The first five patches are the same, but patch #6 has been redone because
on Cell the default should be to use weakly ordered mappings rather than
strongly orde
Make iommu_map_sg take a struct iommu_table. It did so before commit
740c3ce66700640a6e6136ff679b067e92125794 (iommu sg merging: ppc: make
iommu respect the segment size limits).
This stops the function looking in the archdata.dma_data for the iommu
table because in the future it will be called wi
On Sun, May 25, 2008 at 05:32:29PM -0700, Kevin Diggs wrote:
> Hi,
>
> In idle_6xx.S one finds instructions like:
>
> lis r4,[EMAIL PROTECTED]
> lwz r4,[EMAIL PROTECTED](r4)
>
> Can someone explain what this is doing? Presumably the first is loading
> an address and the se
When I changed irq_alloc_host() to take an of_node
(52964f87c64e6c6ea671b5bf3030fb1494090a48: "Add an optional
device_node pointer to the irq_host"), I botched the reference
counting semantics.
Stephen pointed out that it's irq_alloc_host()'s business if
it needs to take an additional reference to
If we do the call to of_address_to_resource() first, then we don't
need to worry about freeing the irq_host (which the code doesn't do
currently anyway).
Signed-off-by: Michael Ellerman <[EMAIL PROTECTED]>
---
arch/powerpc/sysdev/qe_lib/qe_ic.c |8
1 files changed, 4 insertions(+), 4
If we do the call to of_address_to_resource() first, then we don't
need to worry about freeing the irq_host (which the code doesn't do
currently anyway).
Signed-off-by: Michael Ellerman <[EMAIL PROTECTED]>
---
arch/powerpc/sysdev/ipic.c | 10 --
1 files changed, 4 insertions(+), 6 delet
If we do the call ot irq_of_parse_and_map() first, then we don't
need to worry about freeing the irq_host.
Signed-off-by: Michael Ellerman <[EMAIL PROTECTED]>
---
arch/powerpc/platforms/cell/axon_msi.c | 16 +++-
1 files changed, 7 insertions(+), 9 deletions(-)
diff --git a/arch/po
On Fri, May 23, 2008 at 04:40:21PM +1000, Paul Mackerras wrote:
> Nick Piggin writes:
>
> > Anyway, even if there were zero, then the point is still that you
> > implement that API, so you should either strongly order your
> > __raw_ and _relaxed then you can weaken your rmb, or you have to
> > st
Hi,
In idle_6xx.S one finds instructions like:
lis r4,[EMAIL PROTECTED]
lwz r4,[EMAIL PROTECTED](r4)
Can someone explain what this is doing? Presumably the first is loading
an address and the second a value. What do the '@ha' and '@l' do?
Also, is there an
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