From: Kamil Lulko
Add DELAY_INIT quirk to fix the following problem with HP
v222w 16GB Mini:
usb 1-3: unable to read config index 0 descriptor/start: -110
usb 1-3: can't read configurations, error -110
usb 1-3: can't set config #1, error -110
Signed-off-by: Kamil Lulko
Signed-off-by: Kuppuswam
From: Dominik Bozek
wait_for_connected() wait till a port change status to
USB_PORT_STAT_CONNECTION, but this is not possible if
the port is unpowered. The loop will only exit at timeout.
Such case take place if an over-current incident happen
while system is in S3. Then during resume wait_for_c
Hi Segei,
On 04/14/2018 01:35 AM, Sergei Shtylyov wrote:
Please indent with tabs (as above and below), not spaces.
Thanks for the comments. I will fix it in v2.
--
Sathyanarayanan Kuppuswamy
Linux kernel developer
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From: Kamil Lulko
Add DELAY_INIT quirk to fix the following problem with HP
v222w 16GB Mini:
usb 1-3: unable to read config index 0 descriptor/start: -110
usb 1-3: can't read configurations, error -110
usb 1-3: can't set config #1, error -110
Signed-off-by: Kamil Lulko
Signed-off-by: Kuppuswam
registers, the parent device must be resumed.
Reported-by: Sathyanarayanan Kuppuswamy
Fixes: f6fb9ec02be1 ("usb: roles: Add Intel xHCI USB role switch driver")
Signed-off-by: Heikki Krogerus
Tested-by: Kuppuswamy Sathyanarayanan
---
drivers/usb/roles/intel-xhci-usb-role-swi
break;
default:
ret = -EIO;
--
Sathyanarayanan Kuppuswamy
Linux kernel developer
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d the signed-off tag. Let me
confirm it with author and get back to you. Mostly I will submit a v2
with proper sign-off info.
--
Sathyanarayanan Kuppuswamy
Linux kernel developer
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From: Dominik Bozek
ACM driver may accept data to transmit while system is not fully
resumed. In this case ACM driver buffers data and prepare URBs
on usb anchor list.
There is a little chance that two tasks put a char and initiate
acm_tty_flush_chars(). In such a case, driver will put one URB
tw
From: Kuppuswamy Sathyanarayanan
In usb_serial_generic_submit_read_urb() function we are accessing the
port->read_urbs array without any boundry checks. This might lead to
kernel panic when index value goes above array length.
One posible call path for this issue is,
usb_serial_generic_read_bul
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Sathyanarayanan Kuppuswamy
Linux kernel developer
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On 03/08/2018 12:54 AM, Oliver Neukum wrote:
Am Mittwoch, den 07.03.2018, 13:41 -0800 schrieb sathyanarayanan
kuppuswamy :
On 03/07/2018 12:58 PM, Greg KH wrote:
So I don't see why your check is needed, what other code path would ever
call this function in a way that the bounds
On 03/08/2018 03:43 PM, Greg KH wrote:
On Thu, Mar 08, 2018 at 03:29:48PM -0800, sathyanarayanan kuppuswamy wrote:
On 03/08/2018 12:54 AM, Oliver Neukum wrote:
Am Mittwoch, den 07.03.2018, 13:41 -0800 schrieb sathyanarayanan
kuppuswamy :
On 03/07/2018 12:58 PM, Greg KH wrote:
So I
From: Kuppuswamy Sathyanarayanan
Currently all PMIC GPIO domain irqs are consumed by the same
device(bxt_wcove_gpio), so there is no need to export them as
separate interrupts. We can just export only the first level
GPIO irq(BXTWC_GPIO_LVL1_IRQ) as an irq resource and let the
GPIO device driver(
From: Kuppuswamy Sathyanarayanan
Currently in WCOVE PMIC mfd driver, all second level irq chips
are chained to the respective first level irqs. So there is no
need for explicitly unmasking the first level irq in this
driver. This patches removes this level 1 irq unmask support.
Signed-off-by: Ku
From: Kuppuswamy Sathyanarayanan
PMIC mfd driver only exports first level irq for thermal device.
But currently we are reading the irqs from the second level irq
chip, So this patch fixes this issue by adding support to use
first level PMIC thermal irq.
Signed-off-by: Kuppuswamy Sathyanarayanan
From: Kuppuswamy Sathyanarayanan
Whishkey cove PMIC has support to mask/unmask interrupts at two levels.
At first level we can mask/unmask interrupt domains like TMU, GPIO, ADC,
CHGR, BCU THERMAL and PWRBTN and at second level, it provides facility
to mask/unmask individual interrupts belong each
From: Kuppuswamy Sathyanarayanan
PMIC mfd driver only exports first level irq for GPIO device.
But currently we are reading the irqs from the second level irq
chip, So this patch fixes this issue by adding support to use
first level PMIC GPIO irq.
Signed-off-by: Kuppuswamy Sathyanarayanan
Acke
From: Kuppuswamy Sathyanarayanan
Currently, in Whiskey cove PMIC driver, USBC IRQ is moved under charger
level2 irq chip. So use irq_chip_data_chgr to get the USBC virtual IRQ
number.
Signed-off-by: Kuppuswamy Sathyanarayanan
---
drivers/usb/typec/typec_wcove.c | 2 +-
1 file changed, 1 inser
From: Kuppuswamy Sathyanarayanan
Since all second level thermal irqs are consumed by the same
device(bxt_wcove_thermal), there is no need to expose them as separate
interrupts. We can just export only the first level irqs for thermal and
let the device(bxt_wcove_thermal) driver handle the second
From: Kuppuswamy Sathyanarayanan
TMU interrupts are registered as a separate interrupt chip, and
hence it should start its interrupt index(BXTWC_TMU_IRQ) number
from 0. But currently, BXTWC_TMU_IRQ is defined as part of enum
bxtwc_irqs_level2 and its index value is 11. Since this index
value is u
From: Kuppuswamy Sathyanarayanan
Cleanup the resource allocation/free code in probe function by using
devm_* calls.
Signed-off-by: Kuppuswamy Sathyanarayanan
Acked-for-MFD-by: Lee Jones
---
drivers/mfd/intel_soc_pmic_bxtwc.c | 54 +-
1 file changed, 18 ins
From: Kuppuswamy Sathyanarayanan
Following patch set fixes the chained IRQ issue observed in WCOVE PMIC driver.
Changes since v3:
* Added fix for typec wcove driver.
Kuppuswamy Sathyanarayanan (9):
mfd: intel_soc_pmic_bxtwc: fix TMU interrupt index
mfd: intel_soc_pmic_bxtwc: remove thermal
From: Kuppuswamy Sathyanarayanan
Currently in WCOVE PMIC mfd driver, all second level irq chips
are chained to the respective first level irqs. So there is no
need for explicitly unmasking the first level irq in this
driver. This patches removes this level 1 irq unmask support.
Signed-off-by: Ku
From: Kuppuswamy Sathyanarayanan
PMIC mfd driver only exports first level irq for GPIO device.
But currently we are reading the irqs from the second level irq
chip, So this patch fixes this issue by adding support to use
first level PMIC GPIO irq.
Signed-off-by: Kuppuswamy Sathyanarayanan
Acke
From: Kuppuswamy Sathyanarayanan
Whishkey cove PMIC has support to mask/unmask interrupts at two levels.
At first level we can mask/unmask interrupt domains like TMU, GPIO, ADC,
CHGR, BCU THERMAL and PWRBTN and at second level, it provides facility
to mask/unmask individual interrupts belong each
From: Kuppuswamy Sathyanarayanan
Currently all PMIC GPIO domain irqs are consumed by the same
device(bxt_wcove_gpio), so there is no need to export them as
separate interrupts. We can just export only the first level
GPIO irq(BXTWC_GPIO_LVL1_IRQ) as an irq resource and let the
GPIO device driver(
From: Kuppuswamy Sathyanarayanan
Cleanup the resource allocation/free code in probe function by using
devm_* calls.
Signed-off-by: Kuppuswamy Sathyanarayanan
Acked-for-MFD-by: Lee Jones
---
drivers/mfd/intel_soc_pmic_bxtwc.c | 54 +-
1 file changed, 18 ins
From: Kuppuswamy Sathyanarayanan
Since all second level thermal irqs are consumed by the same
device(bxt_wcove_thermal), there is no need to expose them as separate
interrupts. We can just export only the first level irqs for thermal and
let the device(bxt_wcove_thermal) driver handle the second
From: Kuppuswamy Sathyanarayanan
PMIC mfd driver only exports first level irq for thermal device.
But currently we are reading the irqs from the second level irq
chip, So this patch fixes this issue by adding support to use
first level PMIC thermal irq.
Signed-off-by: Kuppuswamy Sathyanarayanan
From: Kuppuswamy Sathyanarayanan
Following patch set adds chained IRQ support to WCOVE PMIC driver.
Changes since v3:
* Added fix for typec wcove driver.
Changes since v4:
* Squashed following two commits, to keep the patch set bisectable.
usb: typec: typec_wcove: Use charger irq chip to g
From: Kuppuswamy Sathyanarayanan
TMU interrupts are registered as a separate interrupt chip, and
hence it should start its interrupt index(BXTWC_TMU_IRQ) number
from 0. But currently, BXTWC_TMU_IRQ is defined as part of enum
bxtwc_irqs_level2 and its index value is 11. Since this index
value is u
From: Kuppuswamy Sathyanarayanan
Whishkey cove PMIC has support to mask/unmask interrupts at two levels.
At first level we can mask/unmask interrupt domains like TMU, GPIO, ADC,
CHGR, BCU THERMAL and PWRBTN and at second level, it provides facility
to mask/unmask individual interrupts belong each
From: Kuppuswamy Sathyanarayanan
Following patch set adds chained IRQ support to WCOVE PMIC driver.
Changes since v3:
* Added fix for typec wcove driver.
Changes since v4:
* Squashed following two commits, to keep the patch set bisectable.
usb: typec: typec_wcove: Use charger irq chip to g
From: Kuppuswamy Sathyanarayanan
Cleanup the resource allocation/free code in probe function by using
devm_* calls.
Signed-off-by: Kuppuswamy Sathyanarayanan
Acked-for-MFD-by: Lee Jones
Reviewed-by: Andy Shevchenko
---
drivers/mfd/intel_soc_pmic_bxtwc.c | 54 +---
From: Kuppuswamy Sathyanarayanan
Since all second level thermal IRQs are consumed by the same
device(bxt_wcove_thermal), there is no need to expose them as separate
interrupts. We can just export only the first level IRQs for thermal and
let the device(bxt_wcove_thermal) driver handle the second
From: Kuppuswamy Sathyanarayanan
Currently all PMIC GPIO domain IRQs are consumed by the same
device(bxt_wcove_gpio), so there is no need to export them as
separate interrupts. We can just export only the first level
GPIO IRQ(BXTWC_GPIO_LVL1_IRQ) as an IRQ resource and let the
GPIO device driver(
From: Kuppuswamy Sathyanarayanan
TMU interrupts are registered as a separate interrupt chip, and
hence it should start its interrupt index(BXTWC_TMU_IRQ) number
from 0. But currently, BXTWC_TMU_IRQ is defined as part of enum
bxtwc_irqs_level2 and its index value is 11. Since this index
value is u
From: Kuppuswamy Sathyanarayanan
Currently in WCOVE PMIC MFD driver, all second level IRQ chips
are chained to the respective first level IRQs. So there is no
need for explicitly unmasking the first level IRQ in this
driver. This patches removes this level 1 IRQ unmask support.
Signed-off-by: Ku
ios);
+ if (pdev->device == PCI_DEVICE_ID_INTEL_BYT)
+ gpiod_remove_lookup_table(&platform_bytcr_gpios);
#ifdef CONFIG_PM
cancel_work_sync(&dwc->wakeup_work);
#endif
--
Sathyanarayanan Kuppuswamy
Linux kernel developer
Hi,
On Sat, Jun 3, 2017 at 6:00 AM, Andy Shevchenko
wrote:
> On Thu, Jun 1, 2017 at 1:37 AM,
> wrote:
>> From: Kuppuswamy Sathyanarayanan
>>
>> PMIC mfd driver only exports first level irq for thermal device.
>> But currently we are reading the irqs from the second level irq
>> chip, So this pa
Hi,
On Sat, Jun 3, 2017 at 10:32 AM, Andy Shevchenko
wrote:
> On Sat, Jun 3, 2017 at 8:28 PM, Sathyanarayanan Kuppuswamy Natarajan
> wrote:
>> Hi,
>>
>> On Sat, Jun 3, 2017 at 6:00 AM, Andy Shevchenko
>> wrote:
>>> On Thu, Jun 1, 2017 at 1:3
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