Hi John,
On 02/01/2017 04:37 AM, John Youn wrote:
On 1/31/2017 5:26 PM, Bruno Herrera wrote:
This patch introduces a new parameter to activate USB OTG HS/FS core
embedded phy transceiver. The STM32F4x9 SoC uses the GGPIO register
to enable the transceiver.
Also add the dwc2_set_params function
On 03/28/2017 03:36 PM, Felipe Balbi wrote:
Hi,
Alexandre Torgue writes:
Hi John,
On 02/01/2017 04:37 AM, John Youn wrote:
On 1/31/2017 5:26 PM, Bruno Herrera wrote:
This patch introduces a new parameter to activate USB OTG HS/FS core
embedded phy transceiver. The STM32F4x9 SoC uses the
Hi
On 02/01/2017 02:25 AM, Bruno Herrera wrote:
The STM32F4x9 MCU family has two DWC2 USB OTG cores on it. One core is
USB OTG FS and other core is USB OTG HS. The USB FS core only works with
its internal phy whilst the USF HS core can work in HS with external ulpi
phy or in FS/LS speed with the
Hi Felip
On 10/11/2017 12:04 PM, Felipe Balbi wrote:
Hi,
Amelie Delaunay writes:
The STM32F7 MCU family embeds two DWC2 USB OTG cores. One core is USB
OTG FS and the other is USB OTG HS. The USB FS core only works with its
internal phy whilst the USB HS core can work in HS with external ULPI
Hi
On 10/11/2017 01:50 PM, Felipe Balbi wrote:
Hi,
Alexandre Torgue writes:
Hi Felip
On 10/11/2017 12:04 PM, Felipe Balbi wrote:
Hi,
Amelie Delaunay writes:
The STM32F7 MCU family embeds two DWC2 USB OTG cores. One core is USB
OTG FS and the other is USB OTG HS. The USB FS core only
On 10/11/2017 03:26 PM, Felipe Balbi wrote:
Hi,
Alexandre Torgue writes:
Hi
On 10/11/2017 01:50 PM, Felipe Balbi wrote:
Hi,
Alexandre Torgue writes:
Hi Felip
On 10/11/2017 12:04 PM, Felipe Balbi wrote:
Hi,
Amelie Delaunay writes:
The STM32F7 MCU family embeds two DWC2 USB OTG
Hi Felipe
On 10/12/2017 10:43 AM, Felipe Balbi wrote:
Hi,
On 10/11/2017 12:04 PM, Felipe Balbi wrote:
Hi,
Amelie Delaunay writes:
The STM32F7 MCU family embeds two DWC2 USB OTG cores. One core is
USB
OTG FS and the other is USB OTG HS. The USB FS core only works
with its
internal phy wh
On 10/12/2017 01:53 PM, Felipe Balbi wrote:
Hi,
Felipe Balbi writes:
I thought that patches 1 and 2, as they are "driver" patches, had to be
applied on USB tree (so Felipe's one), and the others (3 to 7) had to be
applied on STM32-DT tree (Alex's one). Did I miss something?
patch 1 is doc
Hi Amélie,
On 08/28/2017 04:20 PM, Amelie Delaunay wrote:
The STM32F7 MCU family embeds two DWC2 USB OTG cores. One core is USB
OTG FS and the other is USB OTG HS. The USB FS core only works with its
internal phy whilst the USB HS core can work in HS with external ULPI phy
or in FS/LS with the o
