Current GPIO code in cp210x fails to take USB autosuspend into account,
making it practically impossible to use GPIOs with autosuspend enabled
without user configuration. Fix this like for ftdi_sio in a previous patch.
Tested on a CP2102N.
Signed-off-by: Karoly Pados
---
Changelog:
- v2: Restrict
On 16 Feb 2019, Greg KH told this:
> On Sat, Feb 16, 2019 at 04:26:30PM +, Nix wrote:
>> So I just tried to connect up to my ancient Soekris firewall's serial
>> console to try to bisect a problem where it stopped booting in 4.20, and
>> found I couldn't.
>>
>> minicom says:
>>
>> minicom: c
On Tue, Feb 12, 2019 at 4:14 PM Neil Armstrong wrote:
>
> Add the Amlogic G12A Family USB2 OTG PHY Bindings
nit-pick: if you want to keep "OTG" in there then please add a short
description how OTG works on this PHY.
I would describe this as: "Add the Amlogic G12A Family USB2 PHY
Bindings. The PHY
On Tue, Feb 12, 2019 at 4:15 PM Neil Armstrong wrote:
>
> Add the Amlogic G12A Family USB3 + PCIE Combo PHY Bindings.
>
> This PHY can provide exclusively USB3 or PCIE support on shared I/Os.
>
> Signed-off-by: Neil Armstrong
one nit-pick below, but apart from that:
Reviewed-by: Martin Blumenstin
Hi Neil,
On Tue, Feb 12, 2019 at 4:15 PM Neil Armstrong wrote:
>
> Adds the specific compatible string for the DWC2 IP found in the
> Amlogic G12A SoC Family.
>
> Signed-off-by: Neil Armstrong
Reviewed-by: Martin Blumenstingl
> ---
> Documentation/devicetree/bindings/usb/dwc2.txt | 1 +
> 1 f
Hi Neil,
On Tue, Feb 12, 2019 at 4:15 PM Neil Armstrong wrote:
>
> This adds support for the USB2 PHY found in the Amlogic G12A SoC Family.
>
> It supports Host and/or Peripheral mode, depending on it's position.
> The first PHY is only used as Host, but the second supports Dual modes
> defined b
From: Colin Ian King
There is a spelling mistake in a dev_err message. Fix it.
Signed-off-by: Colin Ian King
---
drivers/usb/renesas_usbhs/mod_host.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/usb/renesas_usbhs/mod_host.c
b/drivers/usb/renesas_usbhs/mod_host.c
From: Beniamino Galvani
Date: Fri, 15 Feb 2019 13:20:42 +0100
> The 1199:68C0 USB ID is reused by Sierra WP7607 which requires the DTR
> quirk to be detected. Apply QMI_QUIRK_SET_DTR unconditionally as
> already done for other IDs shared between different devices.
>
> Signed-off-by: Beniamino Ga
Hi,
> From: Colin King, Sent: Monday, February 18, 2019 7:44 AM
>
> From: Colin Ian King
>
> There is a spelling mistake in a dev_err message. Fix it.
>
> Signed-off-by: Colin Ian King
Thank you for the patch!
Acked-by: Yoshihiro Shimoda
Best regards,
Yoshihiro Shimoda
> ---
> drivers/u
> According to the chipidea driver bindings, the USB PHY is specified via the
> "phys"
> phandle node. However, this only takes effect for USB PHYs that use the common
> PHY framework. For legacy USB PHYs, a simple lookup based on the USB PHY
> type is done instead.
>
> This does not play out w
From: David Chen
Per confirming with Realtek all devices containing RTL8153-BD should
activate MAC pass through and there won't use pass through bit on efuse
like in RTL8153-AD.
Signed-off-by: David Chen
---
drivers/net/usb/r8152.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --
Insert a padding between data and the stored_xfer_buffer pointer to
ensure they are not on the same cache line.
Otherwise, the stored_xfer_buffer gets corrupted for IN URBs on
non-cache-coherent systems. (In my case: Lantiq xRX200 MIPS)
Fixes: 3bc04e28a030 ("usb: dwc2: host: Get aligned DMA in a
On Sun, Feb 17, 2019 at 07:13:52PM +, Nix wrote:
> On 16 Feb 2019, Greg KH told this:
>
> > On Sat, Feb 16, 2019 at 04:26:30PM +, Nix wrote:
> >> So I just tried to connect up to my ancient Soekris firewall's serial
> >> console to try to bisect a problem where it stopped booting in 4.20,
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