Hi
> -Original Message-
> From: Oliver Neukum [mailto:oneu...@suse.com]
> Sent: 2018年5月3日 17:18
> To: Jun Li ; robh...@kernel.org;
> heikki.kroge...@linux.intel.com; gre...@linuxfoundation.org;
> li...@roeck-us.net
> Cc: gso...@gmail.com; dl-linux-imx ; Peter Chen
> ; shufan_...@richtek.com
The following changes since commit 6da6c0db5316275015e8cc2959f12a17584aeb64:
Linux v4.17-rc3 (2018-04-29 14:17:42 -0700)
are available in the Git repository at:
https://git.kernel.org/pub/scm/linux/kernel/git/johan/usb-serial.git
tags/usb-serial-4.17-rc4
for you to fetch changes up to 4842
From: Jianguo Sun
This patch set adds bindings doc and xhci driver for xHCI host controller
on HiSilicon STB SoCs.
Jianguo Sun (2):
dt-bindings: usb: add bindings doc for HiSilicon STB xHCI host
controller
xhci: hisilicon: support HiSilicon STB xHCI host controller
.../bindings/usb/his
From: Jianguo Sun
This commit adds bindings doc for HiSilicon STB xHCI host controller.
Signed-off-by: Jianguo Sun
---
.../bindings/usb/hisilicon,histb-xhci.txt | 40 ++
1 file changed, 40 insertions(+)
create mode 100644
Documentation/devicetree/bindings/usb/his
From: Jianguo Sun
This commit adds support for HiSilicon STB xHCI host controller.
Signed-off-by: Jianguo Sun
---
drivers/usb/host/Kconfig | 7 +
drivers/usb/host/Makefile | 1 +
drivers/usb/host/xhci-histb.c | 409 ++
3 files changed, 417 i
Thanks for your comments Minas
> Per my understanding in your system EHCI host also available. Is any
> issue seen if connected to EHCI?
It's already connected to EHCI. The hardware has a GL852GT USB hub on
board, which connects to the RK3188 SoC. The Quectel EC25-E is connected to
GL852GT. There
Hi Jianguo,
On Fri, 2018-05-04 at 17:20 +0800, sunj...@163.com wrote:
> From: Jianguo Sun
>
> This commit adds support for HiSilicon STB xHCI host controller.
>
> Signed-off-by: Jianguo Sun
> ---
> drivers/usb/host/Kconfig | 7 +
> drivers/usb/host/Makefile | 1 +
> drivers/usb/h
Hi Chunfeng,
I forgot to assign the value of xhci->imod_interval.
Will add it in v2 patch. Thanks.
On 05/04/2018 05:59 PM, Chunfeng Yun wrote:
Hi Jianguo,
On Fri, 2018-05-04 at 17:20 +0800, sunj...@163.com wrote:
From: Jianguo Sun
This commit adds support for HiSilicon STB xHCI host control
I have a business to discuss with you, can we talk?
Regards
Faruk Sakawo
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On 03.05.2018 21:56, Alan Stern wrote:
On Thu, 3 May 2018, Mathias Nyman wrote:
When everything is runtime suspended and start system suspend, we first suspend
all
the usb devices, including the roothubs calling choose_wakeup() for the
roothubs.
No flags are set yet. When pm continues suspend
This commit adds a driver for the Xaptum ENF Access Card, a TPM2.0
hardware module for authenticating IoT devices and gateways.
The card consists of a SPI TPM 2.0 chip and a USB-SPI bridge. This
driver configures the bridge, registers the bridge as an SPI
controller, and adds the TPM 2.0 as an SPI
This series add a driver for the Xaptum ENF Access card line
(XAP-EA-00x), a series of mini PCI-e cards containing a TPM 2.0 chip
used to authenticate IoT devices and gateways.
The hardware is essentially a USB-SPI bridge and an SPI TPM 2.0
chip. The first patch registers the bridge as an SPI cont
Normally the system platform (i.e., BIOS/UEFI for x86) is responsible
for performing initialization of the TPM. For these modules, the host
kernel is the platform, so we perform the initialization in the driver
before registering the TPM with the kernel TPM subsystem.
The initialization consists
03.05.18 23:20, Alan Stern пише:
> On Thu, 3 May 2018, Nazar Mokrynskyi wrote:
>
>> 03.05.18 22:16, Alan Stern пише:
>>> On Wed, 2 May 2018, Nazar Mokrynskyi wrote:
>>>
>>> As far as I know, hubs attached at boot time get initialized and
>>> handled in exactly the same way as hubs attached afterwar
Don't rely on event interrupt (EINT) bit alone to detect pending port
change in resume. If no change event is detected the host may be suspended
again, oterwise roothubs are resumed.
There is a lag in xHC setting EINT. If we don't notice the pending change
in resume, and the controller is runtime
You should have CC'ed the author of the offending commit. Added.
On Thu, 3 May 2018, Erick Cafferata wrote:
> Starting from v4.17-rc1, I've been having problems with my laptop's
> webcam. Immediately after attempting to open Guvcview(or any other camera
> software), the system just stops working
On Wed, May 02, 2018 at 03:13:44PM +0200, Mats Karrman wrote:
> Hi Heikki,
>
> On 2018-05-02 10:25, Heikki Krogerus wrote:
>
> > On Wed, May 02, 2018 at 11:23:35AM +0300, Heikki Krogerus wrote:
> > > Hi Mats,
> > >
> > > On Wed, May 02, 2018 at 12:21:07AM +0200, Mats Karrman wrote:
> > > > The c
On Fri, 4 May 2018, Nazar Mokrynskyi wrote:
> 03.05.18 23:20, Alan Stern пише:
> > On Thu, 3 May 2018, Nazar Mokrynskyi wrote:
> >
> >> 03.05.18 22:16, Alan Stern пише:
> >>> On Wed, 2 May 2018, Nazar Mokrynskyi wrote:
> >>>
> >>> As far as I know, hubs attached at boot time get initialized and
>
Hello
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On Fri, 4 May 2018, Alan Stern wrote:
> You can try using the usbreset program from here:
>
> https://marc.info/?l=linux-usb&m=144820655510812&w=2
>
> That program wants the usbfs pathname of the hub instead of the sysfs
> path. So you would call it with
>
> usbreset /dev/bus/usb/
Hi,
On Wed, May 2, 2018 at 10:14 AM, wlf wrote:
> It's a good way to allocate an extra 3 bytes in the original bounce buffer
> for this unaligned
> issue， it's similar to the tailroom of sk_buff. However, just as you said,
> we'd better find
> the special cases where we need an oversized bounce b
On 2018-05-04 16:56, Heikki Krogerus wrote:
On Wed, May 02, 2018 at 03:13:44PM +0200, Mats Karrman wrote:
Hi Heikki,
On 2018-05-02 10:25, Heikki Krogerus wrote:
On Wed, May 02, 2018 at 11:23:35AM +0300, Heikki Krogerus wrote:
Hi Mats,
On Wed, May 02, 2018 at 12:21:07AM +0200, Mats Karrman
On Fri, May 04, 2018 at 10:39:07AM -0400, Alan Stern wrote:
> You should have CC'ed the author of the offending commit. Added.
>
> On Thu, 3 May 2018, Erick Cafferata wrote:
>
> > Starting from v4.17-rc1, I've been having problems with my laptop's
> > webcam. Immediately after attempting to open
Dumping the registers via debugfs makes USB on Raspberry Pi completely
unusable. The read of register GRXSTSP ("Receive Status Read and Pop
Register") is responsible for this behaviour, because it pops the RX FIFO.
So avoid this by omitting the relevant register.
CC: Mian Yousaf Kaukab
Fixes: 563
Add separate dwc3-qcom glue driver for Qualcomm SOCs having dwc3 core.
It is needed to support peripheral mode.
Patches also add support to invoke PHY runtime PM functions on host
mode bus-suspend.
Changes since v2:
- Addressed Rob's comments for DT binding documentation.
Changes since v1:
- Mo
Some PHY drivers (e.g. for Qualcomm QUSB2 and QMP PHYs) support
runtime PM to reduce PHY power consumption during bus_suspend.
Add changes to let core auto-suspend PHYs on host bus-suspend
using GUSB2PHYCFG register if needed for a platform. Also perform
PHYs runtime suspend/resume and let platform
DWC3 controller on Qualcomm SOCs has a Qscratch wrapper.
Some of its uses are described below resulting in need to
have a separate glue driver instead of using dwc3-of-simple:
- It exposes register interface to override vbus-override
and lane0-pwr-present signals going to hardware. These
mus
Existing documentation has lot of incorrect information as it
was originally added for a driver that no longer exists.
Signed-off-by: Manu Gautam
---
.../devicetree/bindings/usb/qcom,dwc3.txt | 85 --
1 file changed, 63 insertions(+), 22 deletions(-)
diff --git a/Do
ASUS UX305UA user. USB ports function normally after system boot. After the
first and any subsequent suspend/resume, the USB ports remain suspended. In
order for a newly plugged in USB device to be recognized, any autosuspended
USB device has to be toggled (autosuspend on and off).
This problem fi
On Fri, May 04, 2018 at 08:00:22AM -0500, David R. Bild wrote:
> Normally the system platform (i.e., BIOS/UEFI for x86) is responsible
> for performing initialization of the TPM. For these modules, the host
> kernel is the platform, so we perform the initialization in the driver
> before registeri
Hi Alan,
I posted a RFC [0] to let the HCD complete the URB in threaded-IRQ
context to avoid the softirq/tasklet. Mauro reported that this does not
help him and never came back after that.
You did not oppose the approach as long as there is no performance issue
which I did not see. Would you mind
Hi,
On Wed, May 2, 2018 at 2:06 PM, Manu Gautam wrote:
> To improve eye diagram for PHYs on different boards of same SOC,
> some parameters may need to be changed. Provide device tree
> properties to override these from board specific device tree
> files. While at it, replace "qcom,qusb2-v2-phy"
Hi,
On Wed, May 2, 2018 at 2:06 PM, Manu Gautam wrote:
> There are two QUSB2 PHYs present on sdm845. In order
> to improve eye diagram for both the PHYs some parameters
> need to be changed. Provide device tree properties to
> override these from board specific device tree files.
>
> Signed-off-b
Hi,
On Wed, May 2, 2018 at 2:06 PM, Manu Gautam wrote:
> QMP PHY for USB/PCIE requires pipe_clk for locking of
> retime buffers at the pipe interface. Driver checks for
> PHY_STATUS without enabling pipe_clk due to which
> phy_init() fails with initialization timeout.
> Though pipe_clk is output
Hi,
On Wed, May 2, 2018 at 2:06 PM, Manu Gautam wrote:
> The USB and PCIE pipe clocks are sourced from external clocks
> inside the QMP USB/PCIE PHYs. Enabling or disabling of PIPE RCG
> clocks is dependent on PHY initialization sequence hence
> update halt_check to BRANCH_HALT_SKIP for these clo
On Fri, May 4, 2018 at 2:06 PM, Jason Gunthorpe wrote:
>
> On Fri, May 04, 2018 at 08:00:22AM -0500, David R. Bild wrote:
> > Normally the system platform (i.e., BIOS/UEFI for x86) is responsible
> > for performing initialization of the TPM. For these modules, the host
> > kernel is the platform,
On Sat, 5 May 2018, Souptick Joarder wrote:
> > What you can't see just from reading the patch is that in both cases
> > (ehci->itd_pool and ehci->sitd_pool) there are two allocation paths --
> > the two branches of an "if" statement -- and only one of the paths
> > calls dma_pool_[z]alloc. Howev
On Fri, 4 May 2018, Sebastian Andrzej Siewior wrote:
> Hi Alan,
>
> I posted a RFC [0] to let the HCD complete the URB in threaded-IRQ
> context to avoid the softirq/tasklet. Mauro reported that this does not
> help him and never came back after that.
> You did not oppose the approach as long as
On Fri, May 4, 2018 at 2:56 PM, David R. Bild wrote:
> 2) The second reason is that the initialization done by the driver is
> work that should be done by platform, before the kernel ever sees the
> TPM.
>
> In particular, it sets the credentials for the platform hierarchy.
> The platform hierarch
On Fri, May 04, 2018 at 11:05:32AM +0200, Johan Hovold wrote:
> The following changes since commit 6da6c0db5316275015e8cc2959f12a17584aeb64:
>
> Linux v4.17-rc3 (2018-04-29 14:17:42 -0700)
>
> are available in the Git repository at:
>
> https://git.kernel.org/pub/scm/linux/kernel/git/johan/u
04.05.18 18:47, Alan Stern пише:
> On Fri, 4 May 2018, Alan Stern wrote:
>
>> You can try using the usbreset program from here:
>>
>> https://marc.info/?l=linux-usb&m=144820655510812&w=2
>>
>> That program wants the usbfs pathname of the hub instead of the sysfs
>> path. So you would call i
Use SPDX-License-Identifier tag instead of the GPL license text
Signed-off-by: Chunfeng Yun
---
v2: change subject line to fix checkpatch warning:
"A patch subject line should describe the change not
the tool that found it"
---
drivers/phy/mediatek/Makefile | 1 +
drivers/phy/medi
>From a0814ad7725587a06d273997e0fdf5161f916fd8 Mon Sep 17 00:00:00 2001
From: Chunfeng Yun
Date: Sat, 5 May 2018 09:56:59 +0800
Subject: [PATCH v2 0/2] Add MediaTek XS-PHY driver
This patch series support the SuperSpeedPlus XS-PHY transceiver for
USB3.1 GEN2 controller on MediaTek chips. The driv
Add a DT binding documentation of XS-PHY for MediaTek SoCs
with USB3.1 GEN2 controller
Signed-off-by: Chunfeng Yun
---
.../devicetree/bindings/phy/phy-mtk-xsphy.txt | 110
1 file changed, 110 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/phy-m
Support XS-PHY for MediaTek SoCs with USB3.1 GEN2 controller
Signed-off-by: Chunfeng Yun
---
drivers/phy/mediatek/Kconfig |9 +
drivers/phy/mediatek/Makefile|1 +
drivers/phy/mediatek/phy-mtk-xsphy.c | 600 ++
3 files changed, 610 insertio
The usb_add_gadget_udc() will set the gadget state as
USB_STATE_NOTATTACHED, so we needn't set it again.
Signed-off-by: Chunfeng Yun
---
drivers/usb/mtu3/mtu3_gadget.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/usb/mtu3/mtu3_gadget.c b/drivers/usb/mtu3/mt
There is an error dialog popped up in PC when test TEST_J/K
by EHSETT tool, due to not waiting for the completion of
control transfer. Here fix it by entering test mode after
Status Stage finish.
Signed-off-by: Chunfeng Yun
---
drivers/usb/mtu3/mtu3_gadget_ep0.c | 10 ++
1 file changed,
In fact the driver depends on EXTCON only when it's configed as
USB_MTU3_DUAL_ROLE, so make USB_MTU3_DUAL_ROLE depend on EXTCON but
not USB_MTU3.
Signed-off-by: Chunfeng Yun
---
drivers/usb/mtu3/Kconfig | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/usb/mtu3/Kconfi
The variable of 'count' is declared as u8, this will cause an issue
due to value truncated when works in SS or SSP mode and data length
is greater than 255, so change it as u32.
Signed-off-by: Chunfeng Yun
---
drivers/usb/mtu3/mtu3_gadget_ep0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(
When boot on the platform with the USB cable connected to Win7,
the Win7 will pop up an error dialog: "USB Device not recognized",
but finally the Win7 can enumerate it successfully.
The root cause is as the following:
When the xHCI driver set PORT_POWER of the OTG port, and if both
IDPIN and VBUS_
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