On Tue, Oct 06, 2015 at 10:54:46PM +0530, Jayan John wrote:
> On Tue, Oct 6, 2015 at 1:31 PM, Greg KH wrote:
> > On Tue, Oct 06, 2015 at 06:07:50AM +0530, Jayan John wrote:
> >> On Tue, Oct 6, 2015 at 3:38 AM, Fabio Estevam wrote:
> >> > On Mon, Oct 5, 2015 at 10:57 AM, Jayan John
> >> > wrote:
Hello,
Acked-by: Abylay Ospan
thanks !
2015-10-03 18:19 GMT+03:00 Christoph Hellwig :
> This ensures the dma mask that is supported by the driver is recorded
> in the device structure.
>
> Signed-off-by: Christoph Hellwig
> ---
> drivers/media/pci/netup_unidvb/netup_unidvb_core.c | 2 +-
> 1
On Tue, Oct 06, 2015 at 10:26:08AM -0700, Paul Zimmerman wrote:
> On Tue, Oct 6, 2015 at 10:01 AM, Alan Stern wrote:
> > On Tue, 6 Oct 2015, Felipe Balbi wrote:
> >
> >> >> In my experience, you need to do at least the following to get max
> >> >> performance from the mass storage gadget:
> >> >>
This bug is soo obscure, I'm not even sure how to start debugging it.
This never used to be a problem, but I'm not sure when it started as
USB (in general) is not something I use regularly.
In this setup, the USB OTG port is wired in host mode via pinmix
configuration of the USB OTG ID pin:
On 07 Oct 2015, at 10:13, Greg KH wrote:
> On Tue, Oct 06, 2015 at 10:26:08AM -0700, Paul Zimmerman wrote:
>> On Tue, Oct 6, 2015 at 10:01 AM, Alan Stern
>> wrote:
>>> On Tue, 6 Oct 2015, Felipe Balbi wrote:
>>>
>> In my experience, you need to do at least the following to get max
>>
This header file will be removed soon.
Signed-off-by: Geert Uytterhoeven
---
Please schedule for v4.3, or provide an Ack, so it can go in through the
GPIO tree. Thanks!
---
drivers/usb/renesas_usbhs/rcar2.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/usb/renesas_usbhs/rcar2.c
b/d
This header file will be removed soon.
Copy the helper macro RCAR_GP_PIN(), which is used by the pinctrl
drivers only, to sh_pfc.h, and drop the #include.
Signed-off-by: Geert Uytterhoeven
---
drivers/pinctrl/sh-pfc/pfc-r8a7778.c | 1 -
drivers/pinctrl/sh-pfc/pfc-r8a7779.c | 1 -
drivers/pinctr
Since commit 4baadb9e05c68962 ("ARM: shmobile: r8a7778: remove obsolete
setup code"), Renesas R-Car SoCs are only supported in generic DT-only
ARM multi-platform builds. The driver doesn't need to use platform data
anymore, hence remove platform data configuration.
Move gpio_rcar_priv.irq_parent
Hi Greg, Linus, Alexandre,
Since commit 4baadb9e05c68962 ("ARM: shmobile: r8a7778: remove obsolete
setup code"), which is now in arm-soc/for-next, Renesas R-Car SoCs are
only supported in generic DT-only ARM multi-platform builds. The driver
doesn't need to use platform data anymore, henc
Hi Geert-san,
> Sent: Wednesday, October 07, 2015 5:24 PM
>
> This header file will be removed soon.
>
> Signed-off-by: Geert Uytterhoeven
> ---
> Please schedule for v4.3, or provide an Ack, so it can go in through the
> GPIO tree. Thanks!
> ---
I'm not sure my Acked-by is useful for it :)
An
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This patch set adds support for R-Car M2-N (r8a7793) and H3 (r8a7795) xHCI
controllers. To add support these new SoCs, this patch set adds a new member
"priv" in struct xhci_hcd.
This patch is based on the latest usb.git / usb-next branch.
(The commit id = d5f9e73309b774dd9d86428edd7958b0960bcb85.
This patch adds a member "firmware_name" in struct xhci_plat_priv
to simplify the code to match specific firmware name.
Signed-off-by: Yoshihiro Shimoda
---
drivers/usb/host/xhci-plat.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/usb/host/xhci-plat.h b/drivers/usb/host/xhci-plat.
This patch adds an xhci->priv field for storing the of_device_id.data
pointer. This will simplify the code to match platform specific
variables (e.g. platform type and firmware name).
Signed-off-by: Yoshihiro Shimoda
---
drivers/usb/host/xhci.h | 3 +++
1 file changed, 3 insertions(+)
diff --gi
This patch adds struct xhci_plat_priv to simplify the code to match
platform specific variables. For now, this patch adds a member "type"
in the structure.
Signed-off-by: Yoshihiro Shimoda
---
drivers/usb/host/xhci-plat.c | 66 +++-
drivers/usb/host/xhci-p
This patch changes code to ease the addition of next generation SoCs.
Signed-off-by: Yoshihiro Shimoda
---
drivers/usb/host/xhci-plat.c | 1 +
drivers/usb/host/xhci-rcar.c | 37 +++--
drivers/usb/host/xhci-rcar.h | 2 ++
3 files changed, 26 insertions(+), 14 del
The R-Car H3 has two xHCI controllers. This SoC is compatible with
R-Car Gen2 SoCs, however this SoC doesn't need some specific registers
setting, and need a new firmware.
Signed-off-by: Yoshihiro Shimoda
---
Documentation/devicetree/bindings/usb/usb-xhci.txt | 4 ++--
drivers/usb/host/xhci-pla
This patch adds support for R-Car M2-N (r8a7793) xHCI controller.
This SoC is compatible with R-Car H2 (r8a7790) and R-Car M2-W (r8a7791).
Signed-off-by: Yoshihiro Shimoda
---
Documentation/devicetree/bindings/usb/usb-xhci.txt | 4 ++--
drivers/usb/host/xhci-plat.c | 3 +++
On 04.10.2015 12:10, Greg KH wrote:
On Wed, Sep 30, 2015 at 02:24:30PM -0700, Duc Dang wrote:
On Thu, Sep 17, 2015 at 11:19 AM, Duc Dang wrote:
The xhci platform driver does not work with system that only supports
64-bit DMA as it requests 32-bit DMA mask during driver initialization.
This pat
Hello,
On 2015-10-07 02:30, Krzysztof Kozlowski wrote:
Introduction
This patchset tries to fix probing of usb3503 on Arndale board
if the Samsung PHY driver is probed later (or built as a module).
*The patchset was not tested on Arndale board.*
I don't have that board. Please test
Implement vbus_status method of musb_platform_ops that allows
musb_core to properly represent the VBUS status of musb_dsps devices in
corresponding sysfs entry
Signed-off-by: Roman Alyautdin
---
drivers/usb/musb/musb_dsps.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/dr
On Fri, Oct 2, 2015 at 10:23 AM, Felipe Balbi via device-mainlining
wrote:
[..]
> The real difficulty here is coming up with an interface which we're agreeing
> to
> supporting for the next 30 years. Whatever that is, as soon as it gets exposed
> to userland, we will have to support it.
>
Isn't
On Mon, Oct 05, 2015 at 09:05:56PM +0900, Yoshihiro Shimoda wrote:
> This patch adds a firmware for the USB 3.0 host controllers of Renesas
> R-Car H3 SoC.
> This firmware is possible to use on R-Car H2 and M2. However, this
> version causes performance degradation on R-Car H2 and M2. So, we would
Occasionally, writing data and immediately closing the port makes cp2108
stop responding. The device had to be unplugged to clear the error.
The failure is induced by shutting down the device while its Tx queue still has
unsent data. Reporting the correct amount of those data avoids the problem.
Ad
cp2108 GET_LINE_CTL returns the 16-bit value with the 2 bytes swapped.
However, SET_LINE_CTL functions properly. When the driver tries to modify
the register, it reads it, modifies some bits and writes back. Because the
read bytes were swapped, this often results in an invalid value to be written.
From: Yunzhi Li
I found that the probe function of dwc2 driver takes much time
when kernel boot up. There are many long delays in the probe
function these take almost 1 second.
This patch trying to reduce unnecessary delay time.
In dwc2_core_reset() I see it use two at least 20ms delays to
wait
On some host-only DWC2 ports (like the one in rk3288) when we set
GUSBCFG_FORCEHOSTMODE in GUSBCFG and then read back, we don't see the
bit set. Presumably that's because the port is always forced to HOST
mode so there's no reason to implement these status bits.
Since we know dwc2_core_reset() is
This is a collection of patches, some by Yunzhi Li at Rockchip and some
by me, that fix dwc2_get_hwparams() on some boards (depending on how the
bootloader left things) and then attempt to optimize DWC2's probe
time (since fixing dwc2_get_hwparams() made probe even slower than it
was). Note that e
Previously dwc2_get_hwparams() was changing GUSBCFG and not putting it
back the way it was (specifically it set and cleared FORCEHOSTMODE).
Since we want to move dwc2_core_reset() _before_ dwc2_get_hwparams() we
should make sure dwc2_get_hwparams() isn't messing with things in a
permanent way.
Sin
In (usb: dwc2: reset dwc2 core before dwc2_get_hwparams()) we added an
extra reset to the probe path for the dwc2 USB controllers. This
allowed proper detection of parameters even if the firmware had already
used the USB part.
Unfortunately, this extra reset is quite slow and is affecting boot
sp
John,
On Mon, Oct 5, 2015 at 3:02 PM, John Youn wrote:
> On 10/1/2015 1:50 PM, Doug Anderson wrote:
>> John,
>>
>> On Tue, Aug 18, 2015 at 5:19 PM, John Youn wrote:
>>> Hi Yunzhi,
>>>
>>> My concern is with the delays due to calling the dwc2_core_reset
>>> during probe. You could factor out the
From: Yunzhi Li
We initiate dwc2 usb controller in BIOS, dwc2_core_reset() should
be called before dwc2_get_hwparams() to reset core registers to
default value. Without this the FIFO setting might be incorrect
because calculating FIFO size need power-on value of
GRXFSIZ/GNPTXFSIZ/HPTXFSIZ registe
On Wed, Oct 07, 2015 at 09:22:22AM +0100, Russell King - ARM Linux wrote:
> This bug is soo obscure, I'm not even sure how to start debugging it.
> This never used to be a problem, but I'm not sure when it started as
> USB (in general) is not something I use regularly.
>
> In this setup, the USB O
On 07.10.2015 23:26, Marek Szyprowski wrote:
> Hello,
>
> On 2015-10-07 02:30, Krzysztof Kozlowski wrote:
>> Introduction
>>
>> This patchset tries to fix probing of usb3503 on Arndale board
>> if the Samsung PHY driver is probed later (or built as a module).
>>
>> *The patchset was n
Hello,
On 2015-10-08 08:02, Krzysztof Kozlowski wrote:
On 07.10.2015 23:26, Marek Szyprowski wrote:
Hello,
On 2015-10-07 02:30, Krzysztof Kozlowski wrote:
Introduction
This patchset tries to fix probing of usb3503 on Arndale board
if the Samsung PHY driver is probed later (or bui
On Fri, Aug 14, 2015 at 12:02:37PM +0200, Lucas Stach wrote:
> Am Freitag, den 14.08.2015, 16:40 +0800 schrieb Peter Chen:
> > On Fri, Aug 14, 2015 at 10:37:30AM +0200, Lucas Stach wrote:
> > > Am Freitag, den 07.08.2015, 15:15 +0800 schrieb Peter Chen:
> > > > It is used to override the default se
On Sun, Oct 04, 2015 at 10:47:58AM +0100, Greg KH wrote:
> On Mon, Sep 07, 2015 at 02:13:57PM +0800, Peter Chen wrote:
> > The bulk queue tests are used to show 'best performance' for bulk
> > transfer, we are often asked this question by users. The implementation
> > is the same with iso test, tha
On Mon, Oct 05, 2015 at 05:37:02AM +, RAJESH BHAGAT wrote:
> Hi Shawn,
>
> Regarding below patch, Felipe has suggested to talk to you:
>
> > [PATCH 3/3][v4] arm: dts: ls1021a: Add quirk for Erratum A009116
>
> talk to you ARM-SoC maintainer.
>
> https://lkml.org/lkml/2015/9/4/7
>
> Please
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