Re: [PATCH 4/6] USB: chipidea: add PTW and PTS handling

2013-01-31 Thread Peter Chen
On Thu, Jan 31, 2013 at 10:01:11AM +0100, Sascha Hauer wrote: > From: Michael Grzeschik > > This patch makes it possible to configure the PTW and PTS bits inside > the portsc register for host and device mode before the driver starts > and the phy can be addressed as hardware implementation is de

Re: [PATCH 4/6] usb: chipidea: add PTW and PTS handling

2013-01-31 Thread Sascha Hauer
On Thu, Jan 31, 2013 at 10:15:54AM +0100, Matthieu CASTET wrote: > >> Why you don't implement it ? > >> > >> If you don't implement it, I believe you should add a warning in order to > >> catch > >> it when used with lpm devices. > > > > I'm against adding a warning because current users seem to

Re: [PATCH 4/6] usb: chipidea: add PTW and PTS handling

2013-01-31 Thread Matthieu CASTET
Sascha Hauer a écrit : > On Wed, Jan 30, 2013 at 05:54:54PM +0100, Matthieu CASTET wrote: >>> diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c >>> index 57cae1f..dcb650f 100644 >>> --- a/drivers/usb/chipidea/core.c >>> +++ b/drivers/usb/chipidea/core.c >>> @@ -67,6 +67,8 @@ >>

Re: [PATCH 4/6] usb: chipidea: add PTW and PTS handling

2013-01-30 Thread Sascha Hauer
On Thu, Jan 31, 2013 at 11:08:54AM +0800, Peter Chen wrote: > On Wed, Jan 30, 2013 at 04:29:40PM +0100, Sascha Hauer wrote: > > From: Michael Grzeschik > > > > +static void hw_phymode_configure(struct ci13xxx *ci) > > +{ > > + u32 portsc; > > + > > + /* > > +* The lpm version has the corr

Re: [PATCH 4/6] usb: chipidea: add PTW and PTS handling

2013-01-30 Thread Peter Chen
On Wed, Jan 30, 2013 at 04:29:40PM +0100, Sascha Hauer wrote: > From: Michael Grzeschik > > +static void hw_phymode_configure(struct ci13xxx *ci) > +{ > + u32 portsc; > + > + /* > + * The lpm version has the corresponding bits in the devlc register. > + * Currently not implement

Re: [PATCH 4/6] usb: chipidea: add PTW and PTS handling

2013-01-30 Thread Sascha Hauer
On Wed, Jan 30, 2013 at 05:54:54PM +0100, Matthieu CASTET wrote: > > diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c > > index 57cae1f..dcb650f 100644 > > --- a/drivers/usb/chipidea/core.c > > +++ b/drivers/usb/chipidea/core.c > > @@ -67,6 +67,8 @@ > > #include > > #includ

Re: [PATCH 4/6] usb: chipidea: add PTW and PTS handling

2013-01-30 Thread Matthieu CASTET
> diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c > index 57cae1f..dcb650f 100644 > --- a/drivers/usb/chipidea/core.c > +++ b/drivers/usb/chipidea/core.c > @@ -67,6 +67,8 @@ > #include > #include > #include > +#include > +#include > > #include "ci.h" > #include "u