Re: [PATCH 3/8] phy: tegra: xusb: t210: rearrange UPHY init

2019-07-08 Thread Peter De Schrijver
On Fri, Jul 05, 2019 at 02:48:49PM +0800, JC Kuo wrote: > > Looks like you are moving all the code from the port enable to the phy > > enable and after this change the port enable does nothing. Do we not > > differentiate between phy and port? I think a bit more description is > > necessary here to

Re: [PATCH 3/8] phy: tegra: xusb: t210: rearrange UPHY init

2019-07-04 Thread JC Kuo
On 7/4/19 9:32 PM, Jon Hunter wrote: > > On 14/06/2019 08:46, JC Kuo wrote: >> This commit is a preparation for enabling XUSB LP0 support. > > By LP0 do you mean ELPG? If so please stick to using one name for > referring to the power-state in question. > >> It rearranges T210 XUSB PADCTL UPHY in

Re: [PATCH 3/8] phy: tegra: xusb: t210: rearrange UPHY init

2019-07-04 Thread Jon Hunter
On 14/06/2019 08:46, JC Kuo wrote: > This commit is a preparation for enabling XUSB LP0 support. By LP0 do you mean ELPG? If so please stick to using one name for referring to the power-state in question. > It rearranges T210 XUSB PADCTL UPHY initialization sequence, Please use Tegra210 and no