Re: [PATCH] usb: xhci: Add 2nd memory barrier to giveback_first_trb()

2013-12-13 Thread Sarah Sharp
On Wed, Nov 13, 2013 at 10:24:00AM -, David Laight wrote: > > Greg KH wrote: > > On Tue, Nov 12, 2013 at 01:58:05PM -, David Laight wrote: > > > > > > There needs to be a wmb() barrier between the write to the cycle bit > > > in the first TRB and the write to the doorbell register. > > > >

RE: [PATCH] usb: xhci: Add 2nd memory barrier to giveback_first_trb()

2013-11-13 Thread David Laight
> Greg KH wrote: > On Tue, Nov 12, 2013 at 01:58:05PM -, David Laight wrote: > > > > There needs to be a wmb() barrier between the write to the cycle bit > > in the first TRB and the write to the doorbell register. > > > > Since it isn't needed in the other places the doobell is rung > > (becau

Re: [PATCH] usb: xhci: Add 2nd memory barrier to giveback_first_trb()

2013-11-12 Thread Greg KH
On Tue, Nov 12, 2013 at 01:58:05PM -, David Laight wrote: > > There needs to be a wmb() barrier between the write to the cycle bit > in the first TRB and the write to the doorbell register. > > Since it isn't needed in the other places the doobell is rung > (because the ring contents haven't