[RESEND PATCHv5] usb: dwc2: Add function to calculate correct FIFO sizes

2014-05-07 Thread dinguyen
From: Dinh Nguyen The dwc2 IP on the SOCFPGA cannot use the default HW configured FIFO sizes. The total FIFO depth as read from GHWCFG3 reports 0x1f80 or 8064 32-bit words. But the GRXFSIZ, GNPTXFSIZ, and HPTXFSIZ register defaults to 0x2000 or 8192 32-bit words. So the driver cannot just use the

Re: [RESEND PATCHv5] usb: dwc2: Add function to calculate correct FIFO sizes

2014-04-28 Thread Dinh Nguyen
On 4/14/14 4:11 PM, dingu...@altera.com wrote: > From: Dinh Nguyen > > The dwc2 IP on the SOCFPGA cannot use the default HW configured > FIFO sizes. The total FIFO depth as read from GHWCFG3 reports 0x1f80 or 8064 > 32-bit words. But the GRXFSIZ, GNPTXFSIZ, and HPTXFSIZ register defaults > to 0x2

[RESEND PATCHv5] usb: dwc2: Add function to calculate correct FIFO sizes

2014-04-14 Thread dinguyen
From: Dinh Nguyen The dwc2 IP on the SOCFPGA cannot use the default HW configured FIFO sizes. The total FIFO depth as read from GHWCFG3 reports 0x1f80 or 8064 32-bit words. But the GRXFSIZ, GNPTXFSIZ, and HPTXFSIZ register defaults to 0x2000 or 8192 32-bit words. So the driver cannot just use the

[PATCHv5] usb: dwc2: Add function to calculate correct FIFO sizes

2014-03-05 Thread dinguyen
From: Dinh Nguyen The dwc2 IP on the SOCFPGA cannot use the default HW configured FIFO sizes. The total FIFO depth as read from GHWCFG3 reports 0x1f80 or 8064 32-bit words. But the GRXFSIZ, GNPTXFSIZ, and HPTXFSIZ register defaults to 0x2000 or 8192 32-bit words. So the driver cannot just use the