Hi,
On Wed, Mar 05, 2014 at 12:08:08AM -0600, dingu...@altera.com wrote:
> From: Dinh Nguyen
>
> The dwc2 IP on the SOCFPGA cannot use the default HW configured
> FIFO sizes. The total FIFO depth as read from GHWCFG3 reports 0x1f80 or 8064
> 32-bit words. But the GRXFSIZ, GNPTXFSIZ, and HPTXFSIZ
From: Dinh Nguyen
The dwc2 IP on the SOCFPGA cannot use the default HW configured
FIFO sizes. The total FIFO depth as read from GHWCFG3 reports 0x1f80 or 8064
32-bit words. But the GRXFSIZ, GNPTXFSIZ, and HPTXFSIZ register defaults
to 0x2000 or 8192 32-bit words. So the driver cannot just use the
