On Wed, Jul 9, 2014 at 11:28 PM, Julius Werner wrote:
> On Wed, Jul 9, 2014 at 3:01 AM, Vivek Gautam wrote:
>> Some quirky PHYs may require to be calibrated post the host
>> controller initialization.
>> The USB 3.0 DRD PHY on Exynos5420/5800 systems, coming along with
>> Synopsys's DWC3 controll
On Wed, Jul 9, 2014 at 3:01 AM, Vivek Gautam wrote:
> Some quirky PHYs may require to be calibrated post the host
> controller initialization.
> The USB 3.0 DRD PHY on Exynos5420/5800 systems, coming along with
> Synopsys's DWC3 controller, is one such PHY which needs to be
> calibrated post xhci'
Some quirky PHYs may require to be calibrated post the host
controller initialization.
The USB 3.0 DRD PHY on Exynos5420/5800 systems, coming along with
Synopsys's DWC3 controller, is one such PHY which needs to be
calibrated post xhci's reset at initialization time and at
resume time, to get the c
