On Sun, Jan 28, 2018 at 09:03:31PM +0100, Martin Blumenstingl wrote:
> Amlogic Meson GX SoCs (GXL and AXG) come with a (host-only) dwc3 USB
> controller. This requires a clock to be enabled and a reset line to be
> pulsed to get the hardware into a known state.
> Add the documentation for this IP b
Amlogic Meson GX SoCs (GXL and AXG) come with a (host-only) dwc3 USB
controller. This requires a clock to be enabled and a reset line to be
pulsed to get the hardware into a known state.
Add the documentation for this IP block, similar to "qcom,dwc3.txt".
Signed-off-by: Martin Blumenstingl
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