On 1/8/2018 4:01 AM, Felipe Balbi wrote:
>
> Hi,
>
> Thinh Nguyen writes:
>> From DWC_usb31 databook section 1.3.2, once DWC3_DCTL_CSFTRST bit is
>> cleared, we must wait at least 50ms before accessing the PHY domain
>> (synchronization delay).
>>
>> Signed-off-by: Thinh Nguyen
>> ---
>> dri
Hi,
Thinh Nguyen writes:
> From DWC_usb31 databook section 1.3.2, once DWC3_DCTL_CSFTRST bit is
> cleared, we must wait at least 50ms before accessing the PHY domain
> (synchronization delay).
>
> Signed-off-by: Thinh Nguyen
> ---
> drivers/usb/dwc3/core.c | 13 -
> 1 file changed,
>From DWC_usb31 databook section 1.3.2, once DWC3_DCTL_CSFTRST bit is
cleared, we must wait at least 50ms before accessing the PHY domain
(synchronization delay).
Signed-off-by: Thinh Nguyen
---
drivers/usb/dwc3/core.c | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
diff --g