On Wed, Aug 02, 2017 at 05:30:36PM +0200, Eric Schwarz wrote:
> Hello Alan,
>
> many thanks for your response.
> Well, I am following the whole discussion from the very start and for my
> taste it is too superficial - don't know whether this is the right wording.
> Please get me right. We need som
Hello Alan,
many thanks for your response.
Well, I am following the whole discussion from the very start and for my
taste it is too superficial - don't know whether this is the right
wording. Please get me right. We need some kind of implementation
specification or a sample way on how to imple
On Wed, Aug 2, 2017 at 6:36 AM, Eric Schwarz wrote:
> Dear all,
>
> DENX Software Engineering develops and brings this driver to mainline on
> behalf of us (ARRI*).
>
> Since there was a lot of discussion around this patch series I would highly
> appreciate if someone could sum up what needs to be
Dear all,
DENX Software Engineering develops and brings this driver to mainline on
behalf of us (ARRI*).
Since there was a lot of discussion around this patch series I would
highly appreciate if someone could sum up what needs to be changed in
detail in order to get this driver into the main
This series adds support for fast passive parallel (FPP) Altera
FPGA configuration using FTDI FT232H chip in FT245-FIFO mode.
It has been used to configure Arria 10 FPGAs.
Patch 1 adds an FT232H MFD driver with common functions that
can be used for FT232H USB-GPIO/I2C/SPI master adapter drivers.
C
