Hi,
On 6/11/2018 12:06 PM, Julien Massot wrote:
Hi,
On 5/31/2018 4:17 PM, Manu Gautam wrote:
Move from dwc3-of-simple to dwc3-qcom glue driver to
support peripheral mode which requires qscratch wrapper
programming on VBUS event.
I would like to test usb otg as peripheral role, but that's no
s since v1:
- Update unit address of DT node as per Doug's comment
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 6 --
arch/arm64/boot/dts/qcom/msm8996.dtsi| 10 ++
2 files changed, 10 insertions(+), 6 deletions(-)
Tested on DB820c. Works fine.
Tested-by: Vivek Gau
On 4/3/2018 3:49 PM, Masahiro Yamada wrote:
2018-04-03 17:46 GMT+09:00 Philipp Zabel :
On Tue, 2018-04-03 at 17:30 +0900, Masahiro Yamada wrote:
2018-04-03 17:00 GMT+09:00 Philipp Zabel :
On Thu, 2018-03-29 at 15:07 +0900, Masahiro Yamada wrote:
This driver handles the reset control in a co
TRL2 0x224
> +#defineQUSB2PHY_CHG_CTRL2 0x23c
nit: Replace these tabs with simple spaces.
Rest all look good.
Reviewed-by: Vivek Gautam
Thanks
Vivek
> +
> struct qusb2_phy_init_tbl {
> unsigned int offset;
> un
On Wed, Jan 3, 2018 at 4:58 PM, Manu Gautam wrote:
> New version of QUSB2 PHY has some registers offset changed.
> Add support to have register layout for a target and update
> the same in phy_configuration.
>
> Signed-off-by: Manu Gautam
> ---
LGTM.
Reviewed-by: Vivek Gauta
On Fri, Jan 12, 2018 at 2:16 PM, Manu Gautam wrote:
> Hi Vivek,
>
>
> On 1/12/2018 2:14 PM, Vivek Gautam wrote:
>> On Wed, Jan 3, 2018 at 4:58 PM, Manu Gautam wrote:
>>> PHY block or asynchronous reset requires signal
>>> to be asserted before de-asserting. Dr
t_list[i]);
> + goto err_rst_assert;
> + }
> }
>
> - for (i = 0; i < cfg->num_resets; i++) {
> + for (i = cfg->num_resets - 1; i >= 0; i--) {
Do we a dependency on the order in which these resets are
applied?
If
on and init for QUSB2 PHY
> need to be executed together always, hence remove
> poweron callback from phy_ops and explicitly perform
> this from init, similar changes needed for poweroff.
>
> Signed-off-by: Manu Gautam
> ---
Looks good.
Reviewed-by: Vivek Gautam
Thanks
Vivek
On Wed, Jan 3, 2018 at 4:58 PM, Manu Gautam wrote:
> PHY regulators which are enabled from power_on() must be ON
> before turning-on clocks and initializing it as part of init().
> As most of the core drivers perform power_on() after init(), move
> PHY regulators enable to com_init() and use power
Hi Manu,
On Wed, Jan 3, 2018 at 4:58 PM, Manu Gautam wrote:
> New revision (v3) of QMP PHY uses different offsets
> for almost all of the registers. Hence, move these
> definitions to header file so that updated offsets
> can be added for QMP v3.
>
> Signed-off-by: Manu Gautam
> ---
> drivers/p
Hi Manu,
On Tue, Nov 21, 2017 at 2:53 PM, Manu Gautam wrote:
> From: Vivek Gautam
>
> Move from using array of clocks to clk_bulk_* APIs that
> are available now.
>
> Signed-off-by: Vivek Gautam
> Signed-off-by: Manu Gautam
> ---
> drivers/phy/q
On 11/21/2017 02:53 PM, Manu Gautam wrote:
New version of QUSB2 PHY has some registers offset changed.
Add support to have register layout for a target and update
the same in phy_configuration.
Signed-off-by: Manu Gautam
---
drivers/phy/qualcomm/phy-qcom-qusb2.c | 131 ++
Hi Adam,
On Mon, Aug 28, 2017 at 10:05 PM, Adam Wallis wrote:
> The dma ops from the parent DWC device are not getting passed to the
> child xhci-hcd device. This patch makes use of
> platform_device_register_full to set the DMA ops. For the DT/OF case,
> dma_ops were still null after the the de
On Wed, Aug 2, 2017 at 10:39 AM, Kishon Vijay Abraham I wrote:
> Vivek,
>
> On Monday 31 July 2017 10:58 AM, Vivek Gautam wrote:
>> Hi Kishon,
>>
>>
>> On Tue, Jun 20, 2017 at 11:27 AM, Vivek Gautam
>> wrote:
>>> Fixing the clk enable failure path
Hi Kishon,
On Tue, Jun 20, 2017 at 11:27 AM, Vivek Gautam
wrote:
> Fixing the clk enable failure path in qcom_qmp_phy_init()
> and cleanup the reset control deassertion failure path in
> qcom_qmp_phy_com_init().
>
> Fixes: e78f3d15e115 ("phy: qcom-qmp: new qmp phy driv
Fixing the clk enable failure path in qcom_qmp_phy_init()
and cleanup the reset control deassertion failure path in
qcom_qmp_phy_com_init().
Fixes: e78f3d15e115 ("phy: qcom-qmp: new qmp phy driver for qcom-chipsets")
Cc: Kishon Vijay Abraham I
Signed-off-by: Vivek Gautam
---
d
Hi Philipp,
On 06/19/2017 05:48 PM, Philipp Zabel wrote:
Hi Vivek,
On Tue, 2017-06-13 at 12:16 +0530, Vivek Gautam wrote:
[...]
@@ -102,18 +94,6 @@ static inline struct reset_control
*__devm_reset_control_get(
return optional ? NULL : ERR_PTR(-ENOTSUPP);
}
-static inline
of APIs
for reset control array.
- Added a patch for soc/tegra/pmc driver to use the new set of
reset control array APIs.
Philipp Zabel (2):
reset: use kref for reference counting
reset: hide reset control arrays behind struct reset_control
Vivek Gautam (4):
reset: Add APIs to m
struct reset_control to
avoid having to introduce new API functions for array (de)assert/reset.
Cc: Vivek Gautam
Cc: Jon Hunter
Signed-off-by: Philipp Zabel
---
drivers/reset/core.c | 225 ++
include/linux/reset.h | 44 +++---
2 files changed
Hi,
On Wed, May 31, 2017 at 7:53 PM, Jon Hunter wrote:
>
> On 22/05/17 12:23, Vivek Gautam wrote:
>> Make use of reset_control_array_*() set of APIs to manage
>> an array of reset controllers available with the device.
>>
>> Cc: Jon Hunter
>> Cc: Thierry Red
ol array.
- Added a patch for soc/tegra/pmc driver to use the new set of
reset control array APIs.
Vivek Gautam (4):
usb: dwc3: of-simple: Re-order resource handling in remove
reset: Add APIs to manage array of resets
usb: dwc3: of-simple: Add support to get resets for the devic
particular order.
Cc: Felipe Balbi
Cc: Jon Hunter
Cc: Philipp Zabel
Signed-off-by: Vivek Gautam
---
drivers/reset/core.c | 204 ++
include/linux/reset.h | 93 +++
2 files changed, 297 insertions(+)
diff --git a/drivers/rese
Add support to get a list of resets available for the device.
These resets must be kept de-asserted until the device is
in use.
Cc: Felipe Balbi
Cc: Philipp Zabel
Signed-off-by: Vivek Gautam
---
drivers/usb/dwc3/dwc3-of-simple.c | 27 +--
1 file changed, 25 insertions
Move clock handling after of_platform_depopulate to achieve
a sequence that is reverse of the probe sequence.
Cc: Felipe Balbi
Signed-off-by: Vivek Gautam
---
- new patch in this series.
drivers/usb/dwc3/dwc3-of-simple.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
Make use of reset_control_array_*() set of APIs to manage
an array of reset controllers available with the device.
Cc: Jon Hunter
Cc: Thierry Reding
Cc: Philipp Zabel
Signed-off-by: Vivek Gautam
---
drivers/soc/tegra/pmc.c | 91 +
1 file
On 05/16/2017 03:40 PM, Kishon Vijay Abraham I wrote:
Hi Vivek,
On Thursday 11 May 2017 12:17 PM, Vivek Gautam wrote:
Adding vendor specific directories in phy to group
phy drivers under their respective vendor umbrella.
Also updated the MAINTAINERS file to reflect the correct
directory
On 05/12/2017 02:15 PM, Kishon Vijay Abraham I wrote:
Hi Vivek,
On Thursday 11 May 2017 12:17 PM, Vivek Gautam wrote:
Adding vendor specific directories in phy to group
phy drivers under their respective vendor umbrella.
Also updated the MAINTAINERS file to reflect the correct
directory
Ulpi phy header is not used for anything. Remove the same
from qcom-hs and qcom-hsic phy drivers.
Signed-off-by: Vivek Gautam
Suggested-by: Stephen Boyd
Cc: Kishon Vijay Abraham I
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-arm-...@vger.kernel.org
Cc: linux-ker...@vger.kernel.org
Cc
Although ULPI phy is currently being used by tusb1210,
there can be other consumers too in future. So move this
to the includes path for phy.
Signed-off-by: Vivek Gautam
Cc: Stephen Boyd
Cc: Heikki Krogerus
Cc: Kishon Vijay Abraham I
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-ker
Adding vendor specific directories in phy to group
phy drivers under their respective vendor umbrella.
Also updated the MAINTAINERS file to reflect the correct
directory structure for phy drivers.
Signed-off-by: Vivek Gautam
Acked-by: Heiko Stuebner
Acked-by: Viresh Kumar
Acked-by: Krzysztof
On Tue, Apr 25, 2017 at 4:41 PM, Jon Hunter wrote:
>
> On 25/04/17 12:06, Vivek Gautam wrote:
>> On 04/25/2017 04:24 PM, Jon Hunter wrote:
>>> On 25/04/17 11:33, Philipp Zabel wrote:
>>>> On Tue, 2017-04-25 at 11:05 +0100, Jon Hunter wrote:
>>>>>
On 04/25/2017 04:24 PM, Jon Hunter wrote:
On 25/04/17 11:33, Philipp Zabel wrote:
On Tue, 2017-04-25 at 11:05 +0100, Jon Hunter wrote:
On 25/04/17 05:15, Vivek Gautam wrote:
On 04/24/2017 06:15 PM, Jon Hunter wrote:
On 18/04/17 12:21, Vivek Gautam wrote:
Make use of reset_control_array_
On 04/24/2017 06:15 PM, Jon Hunter wrote:
On 18/04/17 12:21, Vivek Gautam wrote:
Make use of reset_control_array_*() set of APIs to manage
an array of reset controllers available with the device.
Before we apply this patch, I need to check to see if the order of the
resets managed by the PMC
On 04/19/2017 04:02 PM, Philipp Zabel wrote:
On Tue, 2017-04-18 at 16:51 +0530, Vivek Gautam wrote:
Add support to get a list of resets available for the device.
These resets must be kept de-asserted until the device is
in use.
Cc: Felipe Balbi
Cc: Philipp Zabel
Signed-off-by: Vivek Gautam
Hi Philipp,
On 04/19/2017 04:01 PM, Philipp Zabel wrote:
On Tue, 2017-04-18 at 16:51 +0530, Vivek Gautam wrote:
Many devices may want to request a bunch of resets
and control them. So it's better to manage them as an
array. Add APIs to _get(), _assert(), and _deassert()
an arr
On 04/19/2017 03:55 PM, Philipp Zabel wrote:
On Tue, 2017-04-18 at 16:51 +0530, Vivek Gautam wrote:
Count number of reset phandles available with the device node
to know the resets a given device has.
Cc: Philipp Zabel
Signed-off-by: Vivek Gautam
---
drivers/reset/core.c | 23
Count number of reset phandles available with the device node
to know the resets a given device has.
Cc: Philipp Zabel
Signed-off-by: Vivek Gautam
---
drivers/reset/core.c | 23 +++
include/linux/reset.h | 6 ++
2 files changed, 29 insertions(+)
diff --git a/drivers
Many devices may want to request a bunch of resets
and control them. So it's better to manage them as an
array. Add APIs to _get(), _assert(), and _deassert()
an array of reset_control.
Cc: Philipp Zabel
Signed-off-by: Vivek Gautam
---
drivers/reset/core.c
Make use of reset_control_array_*() set of APIs to manage
an array of reset controllers available with the device.
Cc: Thierry Reding
Cc: Philipp Zabel
Signed-off-by: Vivek Gautam
---
drivers/soc/tegra/pmc.c | 99 ++---
1 file changed, 36 insertions
for reset control array.
- Added a patch for soc/tegra/pmc driver to use the new set of
reset control array APIs.
Vivek Gautam (4):
reset: Add API to count number of reset available with device
reset: Add APIs to manage array of resets
usb: dwc3: of-simple: Add support to get resets for
Add support to get a list of resets available for the device.
These resets must be kept de-asserted until the device is
in use.
Cc: Felipe Balbi
Cc: Philipp Zabel
Signed-off-by: Vivek Gautam
---
drivers/usb/dwc3/dwc3-of-simple.c | 36
1 file changed, 36
On 2017-04-10 10:52, Kishon Vijay Abraham I wrote:
On Friday 07 April 2017 01:37 AM, Vivek Gautam wrote:
The driver uses clock provider interface, and therefore
it fails to build when enabled for COMPILE_TEST, since
COMMON_CLK is not enabled at that time.
So, make PHY_QCOM_QMP depend on
The driver uses clock provider interface, and therefore
it fails to build when enabled for COMPILE_TEST, since
COMMON_CLK is not enabled at that time.
So, make PHY_QCOM_QMP depend on COMMON_CLK as well.
Cc: Fengguang Wu
Cc: Kishon Vijay Abraham I
Signed-off-by: Vivek Gautam
---
Hi Kishon
On 04/06/2017 03:41 PM, Kishon Vijay Abraham I wrote:
On Thursday 06 April 2017 11:21 AM, Vivek Gautam wrote:
Hi Kishon,
Here's the series with fixed checkpatch warnings/checks.
Please pick it for phy/next.
This patch series adds couple of PHY drivers for Qualcomm chipsets.
a) qcom-
Qualcomm chipsets have QUSB2 phy controller that provides
HighSpeed functionality for DWC3 controller.
Adding dt binding information for the same.
Signed-off-by: Vivek Gautam
Reviewed-by: Stephen Boyd
Acked-by: Rob Herring
---
Changes since v7:
- None, just added Stephen's Reviewed-b
for detailed changelogs.
[1] https://patchwork.kernel.org/patch/9567767/
[2] https://patchwork.kernel.org/patch/9567779/
[3] https://github.com/vivekgautam1/linux/tree/linux-v4.11-rc5-qmp-phy-db820c
[4] https://lkml.org/lkml/2017/3/20/407
Vivek Gautam (4):
dt-bindings: phy: Add support for QUSB2 ph
Qualcomm SOCs have QMP phy controller that provides support
to a number of controller, viz. PCIe, UFS, and USB.
Add a new driver, based on generic phy framework, for this
phy controller.
Signed-off-by: Vivek Gautam
Tested-by: Srinivas Kandagatla
Reviewed-by: Stephen Boyd
---
Changes since v7
Qualcomm chipsets have QMP phy controller that provides
support to a number of controller, viz. PCIe, UFS, and USB.
Adding dt binding information for the same.
Signed-off-by: Vivek Gautam
Reviewed-by: Stephen Boyd
Acked-by: Rob Herring
---
Changes since v7:
- None, just added Stephen&#
PHY transceiver driver for QUSB2 phy controller that provides
HighSpeed functionality for DWC3 controller present on
Qualcomm chipsets.
Signed-off-by: Vivek Gautam
Reviewed-by: Stephen Boyd
---
Changes since v7:
- Fixed 'checkpatch --strict' alignment warnings/checks.
Change
Hi Kishon,
On Wed, Apr 5, 2017 at 7:08 PM, Kishon Vijay Abraham I wrote:
> Hi Vivek,
>
> On Wednesday 05 April 2017 06:02 PM, Vivek Gautam wrote:
>> This patch series adds couple of PHY drivers for Qualcomm chipsets.
>> a) qcom-qusb2 phy driver: that provides High Speed US
Qualcomm SOCs have QMP phy controller that provides support
to a number of controller, viz. PCIe, UFS, and USB.
Add a new driver, based on generic phy framework, for this
phy controller.
Signed-off-by: Vivek Gautam
Tested-by: Srinivas Kandagatla
---
Changes since v6:
- Rebased on phy/next and
Qualcomm chipsets have QMP phy controller that provides
support to a number of controller, viz. PCIe, UFS, and USB.
Adding dt binding information for the same.
Signed-off-by: Vivek Gautam
Acked-by: Rob Herring
---
Changes since v6:
- none.
Changes since v5:
- Added Rob's 'Ack&#x
Qualcomm chipsets have QUSB2 phy controller that provides
HighSpeed functionality for DWC3 controller.
Adding dt binding information for the same.
Signed-off-by: Vivek Gautam
Acked-by: Rob Herring
---
Changes since v6:
- Dropped 'vdd-phy-supply' that used pm8994_s2 regulator, fro
PHY transceiver driver for QUSB2 phy controller that provides
HighSpeed functionality for DWC3 controller present on
Qualcomm chipsets.
Signed-off-by: Vivek Gautam
Reviewed-by: Stephen Boyd
---
Changes since v6:
- Dropped 'vdd-phy' from list of regulators.
- Rebased on phy/nex
[4] https://lkml.org/lkml/2017/3/20/407
Vivek Gautam (4):
dt-bindings: phy: Add support for QUSB2 phy
phy: qcom-qusb2: New driver for QUSB2 PHY on Qcom chips
dt-bindings: phy: Add support for QMP phy
phy: qcom-qmp: new qmp phy driver for qcom-chipsets
.../devicetree/bindings/phy/qcom-q
On 04/04/2017 11:58 PM, Stephen Boyd wrote:
On 03/20, Vivek Gautam wrote:
diff --git a/Documentation/devicetree/bindings/phy/qcom-qusb2-phy.txt
b/Documentation/devicetree/bindings/phy/qcom-qusb2-phy.txt
new file mode 100644
index ..a6d19acde9e0
--- /dev/null
+++ b/Documentation
Hi Philipp,
On 04/04/2017 06:17 PM, Philipp Zabel wrote:
Hi Vivek,
On Tue, 2017-04-04 at 16:09 +0530, Vivek Gautam wrote:
[...]
I'd prefer to mirror the gpiod API a little, and to have the number
contained in the array structure, similar to struct gpio_descs:
[...]
Alright, i can u
find my comments inline.
On Mon, 2017-04-03 at 19:12 +0530, Vivek Gautam wrote:
Many devices may want to request a bunch of resets
and control them. So it's better to manage them as an
array. Add APIs to _get(), _assert(), and _deassert()
an array of reset_control.
Cc: Philipp Zabel
Sig
:
https://github.com/0day-ci/linux/commits/Vivek-Gautam/reset-APIs-to-manage-a-list-of-resets/20170404-111639
base: https://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git next
config: x86_64-randconfig-x004-201714 (attached as .config)
compiler: gcc-6 (Debian 6.2.0-3) 6.2.0 20160901
Many devices may want to request a bunch of resets
and control them. So it's better to manage them as an
array. Add APIs to _get(), _assert(), and _deassert()
an array of reset_control.
Cc: Philipp Zabel
Signed-off-by: Vivek Gautam
---
Changes since v1:
- New patch added to the s
Count number of reset phandles available with the device node
to know the resets a given device has.
Cc: Philipp Zabel
Signed-off-by: Vivek Gautam
---
Changes since v1:
- Handling the error path by returning error code for failures
and ENODEV for count equal to 0.
- Moved the function to
b820c target for dwc3-of-simple driver.
-- Build tested for tegra/pmc driver. Needs testing.
[1] https://lkml.org/lkml/2017/2/22/12
[2] https://lkml.org/lkml/2017/2/22/11
Vivek Gautam (4):
reset: Add API to count number of reset available with device
reset: Add APIs to manage array of resets
Add support to get a list of resets available for the device.
These resets must be kept de-asserted until the device is
in use.
Cc: Felipe Balbi
Cc: Philipp Zabel
Signed-off-by: Vivek Gautam
---
Changes since v1:
- Using new APIs for reset control array.
- Using the *_get_exclusive() API
Make use of reset_control_array_*() set of APIs to manage
an array of reset controllers available with the device.
Cc: Thierry Reding
Cc: Philipp Zabel
Signed-off-by: Vivek Gautam
---
Changes since v1:
- New patch added to the series to enable this driver use the
newer set of APIs that
On 03/20/2017 07:24 PM, Vivek Gautam wrote:
This patch series adds couple of PHY drivers for Qualcomm chipsets.
a) qcom-qusb2 phy driver: that provides High Speed USB functionality.
b) qcom-qmp phy driver: that is a combo phy providing support for
USB3, PCIe, UFS and few other controllers
/lists/arm-kernel/msg569990.html
[2] https://patchwork.kernel.org/patch/9567767/
[3] https://patchwork.kernel.org/patch/9567779/
[4] https://github.com/vivekgautam1/linux/tree/linux-phy-next-qcom-phy-db820c
Vivek Gautam (4):
dt-bindings: phy: Add support for QUSB2 phy
phy: qcom-qusb2: New driver for
Qualcomm chipsets have QUSB2 phy controller that provides
HighSpeed functionality for DWC3 controller.
Adding dt binding information for the same.
Signed-off-by: Vivek Gautam
Acked-by: Rob Herring
---
Changes since v5:
- Removed leading 0 from the address in 'reg' property.
Change
PHY transceiver driver for QUSB2 phy controller that provides
HighSpeed functionality for DWC3 controller present on
Qualcomm chipsets.
Signed-off-by: Vivek Gautam
Reviewed-by: Stephen Boyd
---
Changes since v5:
- Rebased on top of phy grouping series. So the driver now sits in
drivers/phy
Qualcomm chipsets have QMP phy controller that provides
support to a number of controller, viz. PCIe, UFS, and USB.
Adding dt binding information for the same.
Signed-off-by: Vivek Gautam
Acked-by: Rob Herring
---
Changes since v5:
- Added Rob's 'Ack' for the new child nodes
Qualcomm SOCs have QMP phy controller that provides support
to a number of controller, viz. PCIe, UFS, and USB.
Add a new driver, based on generic phy framework, for this
phy controller.
Signed-off-by: Vivek Gautam
Tested-by: Srinivas Kandagatla
---
Changes since v5:
- Rebased on top of phy
Ulpi phy header is not used for anything. Remove the same
from qcom-hs and qcom-hsic phy drivers.
Signed-off-by: Vivek Gautam
Suggested-by: Stephen Boyd
Cc: Kishon Vijay Abraham I
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-arm-...@vger.kernel.org
Cc: linux-ker...@vger.kernel.org
Cc
inux-phy/next branch.
[1] https://www.spinics.net/lists/arm-kernel/msg568370.html
Signed-off-by: Vivek Gautam
Cc: Kishon Vijay Abraham I
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-arm-...@vger.kernel.org
Cc: linux-ker...@vger.kernel.org
Cc: linux-usb@vger.kernel.org
--
Vivek Gautam (3)
Adding vendor specific directories in phy to group
phy drivers under their respective vendor umbrella.
Also updated the MAINTAINERS file to reflect the correct
directory structure for phy drivers.
Signed-off-by: Vivek Gautam
Acked-by: Heiko Stuebner
Acked-by: Viresh Kumar
Acked-by: Krzysztof
Although ULPI phy is currently being used by tusb1210,
there can be other consumers too in future. So move this
to the includes path for phy.
Signed-off-by: Vivek Gautam
Cc: Stephen Boyd
Cc: Heikki Krogerus
Cc: Kishon Vijay Abraham I
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-ker
On Tue, Jan 31, 2017 at 12:55 AM, Shuah Khan wrote:
> Change goto labels to meaningful names from a series of errNs.
>
> Signed-off-by: Shuah Khan
> ---
>
> Rebased to usb-next
>
> drivers/usb/dwc3/dwc3-exynos.c | 22 +++---
> 1 file changed, 11 insertions(+), 11 deletions(-)
>
>
Hi,
On 03/15/2017 04:15 PM, Philipp Zabel wrote:
On Wed, 2017-02-22 at 10:54 +0530, Vivek Gautam wrote:
Add support to get a list of resets available for the device.
These resets must be kept de-asserted until the device is
in use.
Cc: Felipe Balbi
Signed-off-by: Vivek Gautam
---
Based on
Hi Philipp,
On Wed, Mar 15, 2017 at 4:10 PM, Philipp Zabel wrote:
> Hi Vivek,
>
> On Fri, 2017-03-10 at 20:10 +0530, Vivek Gautam wrote:
>> Hi Philipp,
>>
>>
>> On Wed, Feb 22, 2017 at 10:54 AM, Vivek Gautam
>> wrote:
>> > Count number of reset
On Wed, Mar 15, 2017 at 1:38 PM, Heiko Stübner wrote:
> Am Dienstag, 14. März 2017, 11:52:50 CET schrieb Vivek Gautam:
>> Adding vendor specific directories in phy to group
>> phy drivers under their respective vendor umbrella.
>>
>> Also updated the MAINTAINERS
Hi Krzysztof,
On 03/14/2017 12:14 PM, Krzysztof Kozlowski wrote:
On Tue, Mar 14, 2017 at 8:22 AM, Vivek Gautam
wrote:
Adding vendor specific directories in phy to group
phy drivers under their respective vendor umbrella.
Also updated the MAINTAINERS file to reflect the correct
directory
Adding vendor specific directories in phy to group
phy drivers under their respective vendor umbrella.
Also updated the MAINTAINERS file to reflect the correct
directory structure for phy drivers.
Signed-off-by: Vivek Gautam
Acked-by: Heiko Stuebner
Acked-by: Viresh Kumar
Cc: Kishon Vijay
Adding vendor specific directories in phy to group
phy drivers under their respective vendor umbrella.
Also updated the MAINTAINERS file to reflect the correct
directory structure for phy drivers.
Signed-off-by: Vivek Gautam
Acked-by: Heiko Stuebner
Acked-by: Viresh Kumar
Cc: Kishon Vijay
Hi Philipp,
On Wed, Feb 22, 2017 at 10:54 AM, Vivek Gautam
wrote:
> Count number of reset phandles available with the device node
> to know the resets a given device has.
>
> Cc: Philipp Zabel
> Signed-off-by: Vivek Gautam
> ---
Any thoughts on this change?
A small addition
On Fri, Mar 10, 2017 at 4:54 PM, Felipe Balbi wrote:
> Vivek Gautam writes:
>
>> Add support to get a list of resets available for the device.
>> These resets must be kept de-asserted until the device is
>> in use.
>>
>> Cc: Felipe Balbi
>> Signed-of
On Sat, Feb 25, 2017 at 9:20 AM, Chanwoo Choi wrote:
> 2017-02-25 12:46 GMT+09:00 Chanwoo Choi :
>> Hi,
>>
>> 2017-02-24 21:02 GMT+09:00 Roger Quadros :
>>> +Chanwoo
>>>
>>> Hi Vivek,
>>>
>>> On 23/02/17 10:34, Vivek Gautam
On 02/24/2017 06:27 AM, Peter Chen wrote:
On Thu, Feb 23, 2017 at 02:04:50PM +0530, Vivek Gautam wrote:
On 02/16/2017 06:36 PM, Roger Quadros wrote:
dra7 OTG core limits the host controller to USB2.0 (high-speed) mode
when we're operating in dual-role.
We work around that by bypassin
On 02/16/2017 06:36 PM, Roger Quadros wrote:
dra7 OTG core limits the host controller to USB2.0 (high-speed) mode
when we're operating in dual-role.
We work around that by bypassing the OTG core and reading the
extcon framework directly for ID/VBUS events.
Signed-off-by: Roger Quadros
---
Count number of reset phandles available with the device node
to know the resets a given device has.
Cc: Philipp Zabel
Signed-off-by: Vivek Gautam
---
Based on torvald's master branch.
include/linux/reset.h | 16
1 file changed, 16 insertions(+)
diff --git a/include/
Add support to get a list of resets available for the device.
These resets must be kept de-asserted until the device is
in use.
Cc: Felipe Balbi
Signed-off-by: Vivek Gautam
---
Based on torvald's master branch.
drivers/usb/dwc3/dwc3-of-simple.c | 49 +
hardware.
Cc: Baolin Wang
Cc: Vivek Gautam
Cc: Alexander Sverdlin
Cc: Mathias Nyman
Signed-off-by: Arnd Bergmann
Signed-off-by: Sriram Dash
---
Hi, Baolin, Vivek and Alexander,
I removed your tested-by tag due to add one change that adding sysdev
for shared hcd too, if your test shows this change
;>> is known to the system firmware or hardware.
>>>>
>>>> Signed-off-by: Arnd Bergmann
>>>> Signed-off-by: Sriram Dash
>>>> Tested-by: Baolin Wang
>>>> Tested-by: Vivek Gautam
>>>> Tested-by: Alexander Sverdlin
device, all the DMA parameters are not
>>> configured properly, notably dma ops for dwc3 devices. So, set
>>> the dma for xhci from sysdev. sysdev is pointing to device that
>>> is known to the system firmware or hardware.
>>>
>>> Signed-off-by: Arn
On Thu, Feb 9, 2017 at 1:19 PM, Roger Quadros wrote:
> Vivek,
>
> On 09/02/17 08:42, Vivek Gautam wrote:
>> Hi Roger,
>>
>> On Mon, Jan 23, 2017 at 4:49 PM, Roger Quadros wrote:
>>> Hi,
>>>
>>> We rely on the OTG controller block to provid
Hi Roger,
On Mon, Jan 23, 2017 at 4:49 PM, Roger Quadros wrote:
> Hi,
>
> We rely on the OTG controller block to provide us with
> VBUS and ID line status via an interrupt.
>
> This is then used to switch the controller between host, peripheral
> and idle roles based on the following table.
>
>
gt; Tested-by: Baolin Wang
> Tested-by: Brian Norris
> Tested-by: Alexander Sverdlin
> Tested-by: Vivek Gautam
> Signed-off-by: Mathias Nyman
> Cc: Felipe Balbi
> Cc: Grygorii Strashko
> Cc: Sinjan Kumar
> Cc: David Fisher
> Cc: Catalin Marinas
> Cc: "Th
t; Signed-off-by: Arnd Bergmann
>> > Signed-off-by: Sriram Dash
>> > Tested-by: Baolin Wang
>> > Tested-by: Vivek Gautam
>> > Tested-by: Alexander Sverdlin
>> > Signed-off-by: Mathias Nyman
>> > ---
>> > diff --git a/drivers/usb/host/x
t; is known to the system firmware or hardware.
>
> Signed-off-by: Arnd Bergmann
> Signed-off-by: Sriram Dash
> Tested-by: Baolin Wang
> Tested-by: Vivek Gautam
> Tested-by: Alexander Sverdlin
> Signed-off-by: Mathias Nyman
> ---
This patch doesn't work for me anym
On 01/20/2017 02:00 PM, Roger Quadros wrote:
Vivek,
On 19/01/17 17:15, vivek.gau...@codeaurora.org wrote:
Hi Roger,
On 2017-01-19 17:45, Roger Quadros wrote:
Vivek,
On 19/01/17 13:56, Vivek Gautam wrote:
Hi,
On Wed, Jun 22, 2016 at 2:00 PM, Roger Quadros wrote:
Luckily hit this
Hi Roger,
On 2017-01-19 17:45, Roger Quadros wrote:
Vivek,
On 19/01/17 13:56, Vivek Gautam wrote:
Hi,
On Wed, Jun 22, 2016 at 2:00 PM, Roger Quadros wrote:
Luckily hit this thread while checking about DRD role functionality
for DWC3.
On 22/06/16 11:14, Felipe Balbi wrote:
Hi,
Roger
Hi,
On Wed, Jun 22, 2016 at 2:00 PM, Roger Quadros wrote:
Luckily hit this thread while checking about DRD role functionality for DWC3.
> On 22/06/16 11:14, Felipe Balbi wrote:
>>
>> Hi,
>>
>> Roger Quadros writes:
>>> For the real use case, some Carplay platforms need it.
>>
; The code in question is not performance sensitive so extra
> calls are not a problem. No extra checks means less code.
>
> Also the current code seems to be more in line with the rest
> of the kernel.
What functionality is missing without the suspend clock? Would
it make sense to change
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