On Fri, Jul 05, 2019 at 02:48:49PM +0800, JC Kuo wrote:
> > Looks like you are moving all the code from the port enable to the phy
> > enable and after this change the port enable does nothing. Do we not
> > differentiate between phy and port? I think a bit more description is
> > necessary here to
On Thu, May 15, 2014 at 09:22:00PM +0200, Stephen Warren wrote:
> On 05/14/2014 06:33 PM, Andrew Bresticker wrote:
> > Initialize the XUSB-related clocks with appropriate parents and rates
> > for both Tegra114 and Tegra124.
>
> These first 4 clock driver patches look plausible to me, although I
>
On Thu, Jun 27, 2013 at 06:15:02PM +0200, Stephen Warren wrote:
> On 06/27/2013 01:20 AM, Mikko Perttunen wrote:
> > On Wed, 26 Jun 2013 20:14:35 +0300, Stephen Warren
> > wrote:
> >
> >> On 06/26/2013 03:59 AM, Mikko Perttunen wrote:
> >>> After this patch, usb vbus regulators for tegra usb phy
