RE: EHSET with hub and PCIe root hub

2019-09-12 Thread Allen Blaylock
>I should add that the USB 2.0 spec includes the following text (from section >11.24.2.13): > >Test mode of a downstream facing port can only be used in >a well defined sequence of hub states. This sequence is >defined as follows: > >1) All enabled downstream facin

RE: EHSET with hub and PCIe root hub

2019-09-12 Thread Allen Blaylock
Thank you Alan, I am still working through understanding the usbmon and this is a helpful hint. I will contact the device manufacturer and see if there is some alternative method they recommend for testing. >Most of the usbmon output shows that a device was attached to port 3 of hub 2 >and enu

RE: EHSET with hub and PCIe root hub

2019-09-11 Thread Allen Blaylock
> >On 9/11/2019 8:27 AM, Peter Chen wrote: >> On 19-09-10 22:01:58, Allen Blaylock wrote: >>> I am trying to validate the USB on an embedded platform based on the NXP >>> i.MX7. >>> So far I have only been able to validate root ports on the board but >

EHSET with hub and PCIe root hub

2019-09-10 Thread Allen Blaylock
I am trying to validate the USB on an embedded platform based on the NXP i.MX7. So far I have only been able to validate root ports on the board but also have a PCIe xhci controller and a microchip USB3503 hub off of the HSIC port on the SoC which I would like to run the tests on. I have review