[PATCH 3/3] arm64: dts: sdm845: Add interconnect properties for USB

2019-09-10 Thread Chandana Kishori Chiluveru
Populate USB DT node with interconnect properties. Signed-off-by: Chandana Kishori Chiluveru --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 12 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index fcb9330..1c41

[PATCH 2/3] usb: dwc3: qcom: Add interconnect support in dwc3 driver

2019-09-10 Thread Chandana Kishori Chiluveru
Add interconnect support in dwc3-qcom driver to vote for bus bandwidth. This requires for two different paths - from USB master to DDR slave. The other is from APPS master to USB slave. Signed-off-by: Chandana Kishori Chiluveru --- drivers/usb/dwc3/dwc3-qcom.c | 147

[PATCH 0/3] ADD interconnect support for USB

2019-09-10 Thread Chandana Kishori Chiluveru
This path series aims to add interconnect support in dwc3-qcom driver on SDM845 SoCs. Chandana Kishori Chiluveru (3): dt-bindings: Introduce interconnect bindings for usb usb: dwc3: qcom: Add interconnect support in dwc3 driver arm64: dts: sdm845: Add interconnect properties for USB .../de

[PATCH 1/3] dt-bindings: Introduce interconnect bindings for usb

2019-09-10 Thread Chandana Kishori Chiluveru
Add documentation for the interconnects and interconnect-names bindings for USB as detailed by bindings/interconnect/interconnect.txt. Signed-off-by: Chandana Kishori Chiluveru --- Documentation/devicetree/bindings/usb/qcom,dwc3.txt | 13 + 1 file changed, 13 insertions(+) diff --gi

Re: EHSET with hub and PCIe root hub

2019-09-10 Thread Manu Gautam
On 9/11/2019 8:27 AM, Peter Chen wrote: > On 19-09-10 22:01:58, Allen Blaylock wrote: >> I am trying to validate the USB on an embedded platform based on the NXP >> i.MX7. >> So far I have only been able to validate root ports on the board but also >> have a >> PCIe xhci controller and a micro

Re: EHSET with hub and PCIe root hub

2019-09-10 Thread Peter Chen
On 19-09-10 22:01:58, Allen Blaylock wrote: > I am trying to validate the USB on an embedded platform based on the NXP > i.MX7. > So far I have only been able to validate root ports on the board but also > have a > PCIe xhci controller and a microchip USB3503 hub off of the HSIC port on the > S

EHSET with hub and PCIe root hub

2019-09-10 Thread Allen Blaylock
I am trying to validate the USB on an embedded platform based on the NXP i.MX7. So far I have only been able to validate root ports on the board but also have a PCIe xhci controller and a microchip USB3503 hub off of the HSIC port on the SoC which I would like to run the tests on. I have review

[PATCH 2/2] usb: chipidea: udc: protect usb interrupt enable

2019-09-10 Thread Peter Chen
From: Jun Li We hit the problem with below sequence: - ci_udc_vbus_session() update vbus_active flag and ci->driver is valid, - before calling the ci_hdrc_gadget_connect(), usb_gadget_udc_stop() is called by application remove gadget driver, - ci_udc_vbus_session() will contine do ci_hdrc_gadget_

[PATCH 1/2] usb: chipidea: udc: add new API ci_hdrc_gadget_connect

2019-09-10 Thread Peter Chen
This API is used enable device function, it is called at below situations: - VBUS is connected during boots up - Hot plug occurs during runtime Signed-off-by: Peter Chen Signed-off-by: Jun Li --- drivers/usb/chipidea/udc.c | 63 +++--- 1 file changed, 32 insertio