Hi,
Thinh Nguyen writes:
> While testing our host system using Microsoft's usb stack against our
> gadget for various BESL values, we found an issue with their usb stack
> when the recommended baseline BESL value is 0 (125us) or when the deep
> BESL is 1 or less. The Windows host will issue a
While testing our host system using Microsoft's usb stack against our
gadget for various BESL values, we found an issue with their usb stack
when the recommended baseline BESL value is 0 (125us) or when the deep
BESL is 1 or less. The Windows host will issue a usb reset immediately
after it receive
Hi Saranya,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on linus/master]
[cannot apply to v5.3-rc6 next-20190827]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/comm
Enable static DRD mode in Intel platforms which guarantees
successful role switch all the time. This fixes issues like
software role switch failure after cold boot and issue with
role switch when USB 3.0 cable is used. But, do not enable
static DRD mode for Cherrytrail devices which rely on firmwar
In platforms like Cherrytrail, 'SW switch enable' bit
should not be enabled for role switch. This patch
adds a property to Intel USB Role Switch platform driver
to denote that SW switch should be disabled in
Cherrytrail devices.
Signed-off-by: Saranya Gopal
Signed-off-by: Balaji Manoharan
Sugges
> On Wed, Aug 28, 2019 at 08:38:52PM +0530, Saranya Gopal wrote:
> > Enable static DRD mode in Intel platforms which guarantees
> > successful role switch all the time. This fixes issues like
> > software role switch failure after cold boot and issue with
> > role switch when USB 3.0 cable is used.
> > > >
> > > > If you really want to have this policy in the driver(s), then
> > > > please consider extending eth_platform_get_mac_address() with an
> > > > x86/acpi method. This will make the device driver code support
> > > > fetching the mac address from device tree and Sparc idproms too.
>
On Wed, Aug 28, 2019 at 08:38:52PM +0530, Saranya Gopal wrote:
> Enable static DRD mode in Intel platforms which guarantees
> successful role switch all the time. This fixes issues like
> software role switch failure after cold boot and issue with
> role switch when USB 3.0 cable is used. But, do n
On Wed, Aug 28, 2019 at 08:38:51PM +0530, Saranya Gopal wrote:
> In platforms like Cherrytrail, 'SW switch enable' bit
> should not be enabled for role switch. This patch
> adds a property to Intel USB Role Switch platform driver
> to denote that SW switch should be disabled in
> Cherrytrail device
Hi Hans and Heikki,
I have addressed the review comments of Hans and resubmitting this
patch series of enabling static DRD mode for role switch in all
platforms except Cherrytrail.
Saranya Gopal (2):
xhci-ext-caps.c: Add property to disable Intel SW switch
usb: roles: intel: Enable static DRD
In platforms like Cherrytrail, 'SW switch enable' bit
should not be enabled for role switch. This patch
adds a property to Intel USB Role Switch platform driver
to denote that SW switch should be disabled in
Cherrytrail devices.
Signed-off-by: Saranya Gopal
Signed-off-by: Balaji Manoharan
Signed
Enable static DRD mode in Intel platforms which guarantees
successful role switch all the time. This fixes issues like
software role switch failure after cold boot and issue with
role switch when USB 3.0 cable is used. But, do not enable
static DRD mode for Cherrytrail devices which rely on firmwar
With commit 594632efbb9a ("usb: musb: Adding musb support for OMAP4430")
we were supposed to call otg_set_vbus() only if enabling session for a
A-device fails. But the conditional test was always true and at some point
commit 10770c5aa0fe ("usb: musb: omap2430.c delete unused variable.")
removed th
Zitat von Felipe Balbi :
Hi,
Benjamin Herrenschmidt writes:
On Wed, 2019-08-28 at 13:09 +0300, Felipe Balbi wrote:
Hi,
Benjamin Herrenschmidt writes:
> The split into multiple structures of the "ll" register bank is
> impractical. It makes it hard to add ll_lfps_timers_2 which is
> at o
Hello,
syzbot has tested the proposed patch but the reproducer still triggered
crash:
WARNING in mxl111sf_ctrl_msg
usb 6-1: selecting invalid altsetting 1
set interface failed
[ cut here ]
DEBUG_LOCKS_WARN_ON(lock->magic != lock)
WARNING: CPU: 0 PID: 12 at kernel/locki
Hi,
Benjamin Herrenschmidt writes:
> On Wed, 2019-08-28 at 13:09 +0300, Felipe Balbi wrote:
>> Hi,
>>
>> Benjamin Herrenschmidt writes:
>>
>> > The split into multiple structures of the "ll" register bank is
>> > impractical. It makes it hard to add ll_lfps_timers_2 which is
>> > at offset 0x
On Wed, Aug 28, 2019 at 12:49:51PM +0200, Jessica Yu wrote:
+++ Matthias Maennich [21/08/19 12:49 +0100]:
To avoid excessive usage of EXPORT_SYMBOL_NS(sym, MY_NAMESPACE), where
MY_NAMESPACE will always be the namespace we are exporting to, allow
exporting all definitions of EXPORT_SYMBOL() and f
The Falcon microcontroller that runs the XUSB firmware and which is
responsible for exposing the XHCI interface can address only 40 bits of
memory. Typically that's not a problem because Tegra devices don't have
enough system memory to exceed those 40 bits.
However, if the ARM SMMU is enable on Te
On Wed, 2019-08-28 at 13:09 +0300, Felipe Balbi wrote:
> Hi,
>
> Benjamin Herrenschmidt writes:
>
> > The split into multiple structures of the "ll" register bank is
> > impractical. It makes it hard to add ll_lfps_timers_2 which is
> > at offset 0x794, which is outside of the existing "lfps" st
Hi,
Benjamin Herrenschmidt writes:
> The split into multiple structures of the "ll" register bank is
> impractical. It makes it hard to add ll_lfps_timers_2 which is
> at offset 0x794, which is outside of the existing "lfps" structure
> and would require us to add yet another one.
>
> Instead, m
On Wed, Aug 28, 2019 at 10:34 AM Daniel Drake wrote:
>
> On Tue, Aug 27, 2019 at 3:48 PM Rafael J. Wysocki wrote:
> > That depends on what exactly happens when you try to do the D0-D3-D0
> > with setpci. If the device becomes unreachable (or worse) after that,
> > it indicates a platform issue.
On Tue, Aug 27, 2019 at 3:48 PM Rafael J. Wysocki wrote:
> That depends on what exactly happens when you try to do the D0-D3-D0
> with setpci. If the device becomes unreachable (or worse) after that,
> it indicates a platform issue. It should not do any harm at the
> least.
>
> However, in princ
Hi Heikki,
Yes, we will fix this and resubmit a newer version of the patch.
Thanks,
Saranya
> -Original Message-
> From: Heikki Krogerus [mailto:heikki.kroge...@linux.intel.com]
> Sent: Wednesday, August 28, 2019 1:12 PM
> To: Hans de Goede ; Gopal, Saranya
> ; Balaji, M
> Cc: Greg KH ;
On 27.8.2019 19.35, Theodore Y. Ts'o wrote:
On Tue, Aug 27, 2019 at 08:00:14AM +0200, Harald Dunkel wrote:
FYI: "fsck -y" on an external USB drive (USB-C, ext4) gave
me a ton of messages
:
[ 191.261939] xhci_hcd :05:00.0: WARN Wrong bounce buffer write length:
1024 != 0
[ 191.263743] xhc
On Tue, Aug 27, 2019 at 03:39:18PM +0200, Hans de Goede wrote:
> Hi,
>
> On 26-08-19 16:32, Heikki Krogerus wrote:
> > From: Saranya Gopal
> >
> > Enable static DRD mode in Intel platforms which guarantees
> > successful role switch all the time. This fixes issues like
> > software role switch f
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