Hi
On 19.6.2019 22.03, Rob Weber wrote:
Hi Mathias,
I am working on running our custom USB dual-role product through some
compliance testing. It seems that the SoC and host controller are
not responding to the LFPS signaling and timeout that is supposed to
automatically begin the compliance tes
> At imx7ulp, the USB related analog register is located in PHY register
> region too, so we need to control PLL at PHY driver directly.
>
Hi Felipe,
Would you please have a review for Patch 1 and Patch 2 in this series?
Thanks.
Peter
> Signed-off-by: Peter Chen
> ---
> drivers/usb/phy/phy-mx
On Mon, Jun 24, 2019 at 10:02:57AM +0800, Peter Chen wrote:
> Enable USBOTG1 support for evk board, it is dual-role function
> port.
>
> Signed-off-by: Peter Chen
Applied, thanks.
On Mon, Jun 24, 2019 at 10:02:56AM +0800, Peter Chen wrote:
> Add imx7ulp USBOTG1 support.
>
> Signed-off-by: Peter Chen
Applied, thanks.
Since the chipidea common code support get the USB PHY phandle from
"phys", the glue layer is not mandatory to get the "fsl,usbphy" phandle
any more.
Signed-off-by: Peter Chen
---
drivers/usb/chipidea/ci_hdrc_imx.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/
Add compatible string for imx7ulp
Reviewed-by: Rob Herring
Signed-off-by: Peter Chen
---
Documentation/devicetree/bindings/usb/usbmisc-imx.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/usb/usbmisc-imx.txt
b/Documentation/devicetree/bindings/usb/usbmi
Add imx7ulp USBOTG1 support.
Signed-off-by: Peter Chen
---
arch/arm/boot/dts/imx7ulp.dtsi | 28
1 file changed, 28 insertions(+)
diff --git a/arch/arm/boot/dts/imx7ulp.dtsi b/arch/arm/boot/dts/imx7ulp.dtsi
index d6b711011cba..2679856aaf65 100644
--- a/arch/arm/boot/
Enable USBOTG1 support for evk board, it is dual-role function
port.
Signed-off-by: Peter Chen
---
arch/arm/boot/dts/imx7ulp-evk.dts | 35 +++
1 file changed, 35 insertions(+)
diff --git a/arch/arm/boot/dts/imx7ulp-evk.dts
b/arch/arm/boot/dts/imx7ulp-evk.dts
ind
In this commit, we add CI_HDRC_PMQOS to avoid system entering idle,
at imx7ulp, if the system enters idle, the DMA will stop, so the USB
transfer can't work at this case.
Signed-off-by: Peter Chen
---
drivers/usb/chipidea/ci_hdrc_imx.c | 28 +++-
drivers/usb/chipidea/usbm
Add compatible string for imx7ulp.
Reviewed-by: Rob Herring
Signed-off-by: Peter Chen
---
Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt
b/Documentation/devicetree/bindings/usb/ci
At imx7ulp, the USB related analog register is located in PHY register
region too, so we need to control PLL at PHY driver directly.
Signed-off-by: Peter Chen
---
drivers/usb/phy/phy-mxs-usb.c | 67 ++-
1 file changed, 66 insertions(+), 1 deletion(-)
diff
Changes for v5:
- Change DT node name from 'usbphy' to usb-phy'. [Patch 1/8, 6/8]
Changes for v4:
- Delete the oldest compatible for usbotg1, usbmisc and usbphy.
[Patch 6/8]
Changes for v3:
- Using readl_poll_timeout to replace private function. [Patch 2/8]
- Add more commit log for new flag CI_H
Add compatible for 7ulp USB PHY.
Reviewed-by: Rob Herring
Signed-off-by: Peter Chen
---
Documentation/devicetree/bindings/phy/mxs-usb-phy.txt | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/phy/mxs-usb-phy.txt
b/Documentation/devicetree/b
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