From: Colin Ian King
trivial fix to spelling mistake
Signed-off-by: Colin Ian King
---
drivers/usb/gadget/udc/bdc/bdc_ep.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/usb/gadget/udc/bdc/bdc_ep.c
b/drivers/usb/gadget/udc/bdc/bdc_ep.c
index d619950..b48b259 10064
On Sat, Jun 04, 2016 at 12:06:06AM +0800, Lu Baolu wrote:
> Hi Peter,
>
> On 06/03/2016 03:41 PM, Peter Chen wrote:
> > On Thu, Jun 02, 2016 at 09:37:24AM +0800, Lu Baolu wrote:
> >> > Several Intel platforms implement USB dual role by having completely
> >> > separate xHCI and dwc3 IPs in PCH or
To avoid printk() overhead while debugging, this patch implements the
foundation of tracepoints logging for musb driver to make debug
easier.
Signed-off-by: Bin Liu
---
v2: add missing header to fix compilation error
drivers/usb/musb/Makefile | 5 +++-
drivers/usb/musb/musb_debug.h | 2 ++
Add tracepoints for cppi41 dma channels.
Signed-off-by: Bin Liu
---
v2: new patch
drivers/usb/musb/musb_cppi41.c | 22 ++---
drivers/usb/musb/musb_trace.h | 70 ++
2 files changed, 80 insertions(+), 12 deletions(-)
diff --git a/drivers/usb/musb/
davinci.h is not required by cppi_dma.h but cppi_dma.c, so move the
include to the right place.
Signed-off-by: Bin Liu
---
v2: new patch
drivers/usb/musb/cppi_dma.c | 1 +
drivers/usb/musb/cppi_dma.h | 8
2 files changed, 1 insertion(+), 8 deletions(-)
diff --git a/drivers/usb/musb/cp
Move struct cppi41_dma_channel to the header file so other modules can
use it.
Signed-off-by: Bin Liu
---
v2: new patch
drivers/usb/musb/cppi_dma.h| 23 ++-
drivers/usb/musb/musb_cppi41.c | 21 +
2 files changed, 23 insertions(+), 21 deletions(-)
dif
Hi,
I have added tracepoints in musb in my local tree since a year+ ago, mainly
used to dump register access logs for my debugging. Now I extended it to cover
more debug cases, tracing urb, usb_request, cppi41, and also converted
dev_dbg() to tracepoints.
Please review them and let me know your c
This adds tracepoints to musb register read/write wrappers to get
trace log for register access.
The default tacepoint log prefix here would be musb_readX/writeX(),
which is not much helpful. So this patch let the tracepoints use
__buildin_return_address(0) to print the caller funciton name to
pro
musb core already exports the register read/write wrappers, so clean up
the duplication in dsps glue.
Signed-off-by: Bin Liu
---
v2: no change.
drivers/usb/musb/musb_dsps.c | 112 +--
1 file changed, 44 insertions(+), 68 deletions(-)
diff --git a/drivers
This adds tracepoints to dump musb interrupt events.
Signed-off-by: Bin Liu
---
v2: move header musb_core.h to patch #1
drivers/usb/musb/musb_core.c | 4 +---
drivers/usb/musb/musb_trace.h | 21 +
2 files changed, 22 insertions(+), 3 deletions(-)
diff --git a/drivers/usb/
Add urb tracepoints for host mode.
Signed-off-by: Bin Liu
---
v2: adjust log print for easy reading
drivers/usb/musb/musb_host.c | 34 ++-
drivers/usb/musb/musb_trace.h | 63 +++
2 files changed, 71 insertions(+), 26 deletions(-)
dif
Switch dev_dbg() to tracepoint debug musb_dbg().
Signed-off-by: Bin Liu
---
v2: switch some missing dev_dbg() to musb_dbg()
fix 80 col warnings by checkpatch.pl
drivers/usb/musb/cppi_dma.c| 50 +
drivers/usb/musb/musb_core.c | 64 +++---
drive
Add usb_request tracepoints for gadget mode.
Signed-off-by: Bin Liu
---
v2: adjust log print to easy reading
move urb trace change to patch #6
fix checkpatch.pl warnings
drivers/usb/musb/musb_gadget.c | 35 ---
drivers/usb/musb/musb_trace.h | 76
Am Freitag, 3. Juni 2016, 12:59:22 schrieb Guenter Roeck:
> On Thu, Jun 02, 2016 at 02:48:10PM +0800, Frank Wang wrote:
> > The newer SoCs (rk3366, rk3399) take a different usb-phy IP block
> > than rk3288 and before, and most of phy-related registers are also
> > different from the past, so a new
Hi, I think I have a bug in the OHCI driver.
Kernel version: 4.4.11 (some old 3.14 seems fine, didn't try others)
Hardware: AMD SB850, Eagle III USB ADSL modem
Steps to reproduce:
1. boot with a USB keyboard
2. connect the modem
3. wait for the firmware, re-enumeration, etc
4. disconnect the mo
This removes 10 timer wakeups per second. I'm running this patch for
a while now and haven't spotted any adverse effects.
Signed-off-by: Lucas Stach
---
drivers/usb/host/ehci-pci.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c
in
On Thu 2016-05-19 15:44:54, Heikki Krogerus wrote:
> The purpose of this class is to provide unified interface for user
> space to get the status and basic information about USB Type-C
> Connectors in the system, control data role swapping, and when USB PD
> is available, also power role swapping a
On Thu, Jun 02, 2016 at 02:48:10PM +0800, Frank Wang wrote:
> The newer SoCs (rk3366, rk3399) take a different usb-phy IP block
> than rk3288 and before, and most of phy-related registers are also
> different from the past, so a new phy driver is required necessarily.
>
> Signed-off-by: Frank Wang
On Thu, Jun 02, 2016 at 02:48:10PM +0800, Frank Wang wrote:
> The newer SoCs (rk3366, rk3399) take a different usb-phy IP block
> than rk3288 and before, and most of phy-related registers are also
> different from the past, so a new phy driver is required necessarily.
>
> Signed-off-by: Frank Wang
Am 03.06.2016 um 10:46 schrieb Benjamin Tissoires:
> On May 28 2016 or thereabouts, Heiner Kallweit wrote:
>> Am 27.05.2016 um 23:45 schrieb Benjamin Tissoires:
>>> On May 27 2016 or thereabouts, Heiner Kallweit wrote:
The Riso Kagaku Webmail Notifier (and its clones) is supported as part of
>
On Thu, Jun 02, 2016 at 02:48:09PM +0800, Frank Wang wrote:
> Signed-off-by: Frank Wang
> ---
>
> Changes in v2:
> - Changed vbus_host optional property from gpio to regulator.
> - Specified vbus_otg-supply optional property.
> - Specified otg_id and otg_bvalid property.
>
> .../bindings/phy
On 6/3/2016 3:55 AM, Felipe Balbi wrote:
>
> Hi,
>
> John Youn writes:
> This reverts back to the original buggy behavior. This will fail when
> a SET_INTERFACE occurs multiple times.
>
> You can run testusb to see the failure:
> testusb -t 9 -c 5000 -s 2048 -a
I ca
On Fri, Jun 03, 2016 at 06:17:46PM +0300, Heikki Krogerus wrote:
[ ... ]
> > > >
> > > > In my test case, this gives me
> > > > /sys/class/type-c/usbc0/
> > > > usbc0.svid:18d1
> > > > usbc0.svid:18d1/mode0
> > > > usbc0.svid:18d1/mode0/vdo
> > > > usbc0.svid:1
On 6/3/2016 8:59 AM, dingu...@opensource.altera.com wrote:
> From: Dinh Nguyen
>
> Allow for platforms that have a reset controller driver in place to bring
> the USB IP out of reset.
>
> Signed-off-by: Dinh Nguyen
> Acked-by: John Youn
> Tested-by: Stefan Wahren
> ---
> v7: Use devm_reset_co
Hi Peter,
On 06/03/2016 03:41 PM, Peter Chen wrote:
> On Thu, Jun 02, 2016 at 09:37:24AM +0800, Lu Baolu wrote:
>> > Several Intel platforms implement USB dual role by having completely
>> > separate xHCI and dwc3 IPs in PCH or SOC silicons. These two IPs share
>> > a single USB port. There is ano
From: Dinh Nguyen
Allow for platforms that have a reset controller driver in place to bring
the USB IP out of reset.
Signed-off-by: Dinh Nguyen
Acked-by: John Youn
Tested-by: Stefan Wahren
---
v7: Use devm_reset_control_get_optional()
v6: fix 80 line checkpatch warning in dev_err print
v5: up
Hi Rob,
On 04/14/2016 11:40 AM, Rob Herring wrote:
> On Wed, Apr 13, 2016 at 05:44:01PM -0500, dingu...@opensource.altera.com
> wrote:
>> From: Dinh Nguyen
>>
>> Document the optional 'resets' and 'reset-names' property for the DWC2 usb
>> core.
>>
>> Signed-off-by: Dinh Nguyen
>> ---
>> Cc: Ro
From: Dinh Nguyen
Allow for platforms that have a reset controller driver in place to bring
the USB IP out of reset.
Signed-off-by: Dinh Nguyen
Acked-by: John Youn
Tested-by: Stefan Wahren
---
v7: Use devm_reset_control_get_optional()
v6: fix 80 line checkpatch warning in dev_err print
v5: up
On Fri, Jun 03, 2016 at 08:53:58AM +0200, Marc Haber wrote:
> On Mon, May 30, 2016 at 01:47:12PM -0700, Greg KH wrote:
> > On Mon, May 30, 2016 at 09:02:54PM +0200, Marc Haber wrote:
> > > Hi,
> > >
> > > on my Bananapis, in kernel 4.6 USB does not work. Kernel configuration
> > > is USB-wise iden
On Fri, Jun 03, 2016 at 06:51:54AM -0700, Guenter Roeck wrote:
> On 06/03/2016 06:21 AM, Heikki Krogerus wrote:
> > Hi,
> >
> > On Thu, Jun 02, 2016 at 09:12:19AM -0700, Guenter Roeck wrote:
> > > On Thu, Jun 02, 2016 at 01:18:53PM +0300, Heikki Krogerus wrote:
> > > > On Wed, Jun 01, 2016 at 04:2
> -Original Message-
> From: Greg KH [mailto:gre...@linuxfoundation.org]
> Sent: Thursday, June 2, 2016 9:02 PM
> To: Limonciello, Mario
> Cc: hayesw...@realtek.com; linux-ker...@vger.kernel.org;
> net...@vger.kernel.org; linux-usb@vger.kernel.org; pali.ro...@gmail.com;
> anthony.w...@cano
> -Original Message-
> From: Hayes Wang [mailto:hayesw...@realtek.com]
> Sent: Friday, June 3, 2016 4:44 AM
> To: Limonciello, Mario
> Cc: LKML ; Netdev
> ; Linux USB ;
> pali.ro...@gmail.com; anthony.w...@canonical.com; Greg KH
>
> Subject: RE: [PATCH v2] r8152: Add support for setting M
> -Original Message-
> From: Hayes Wang [mailto:hayesw...@realtek.com]
> Sent: Friday, June 3, 2016 4:23 AM
> To: Limonciello, Mario ;
> gre...@linuxfoundation.org
> Cc: linux-ker...@vger.kernel.org; net...@vger.kernel.org; linux-
> u...@vger.kernel.org; pali.ro...@gmail.com; anthony.w...@c
> -Original Message-
> From: Andrew Lunn [mailto:and...@lunn.ch]
> Sent: Thursday, June 2, 2016 2:10 PM
> To: Limonciello, Mario
> Cc: gre...@linuxfoundation.org; hayesw...@realtek.com; linux-
> ker...@vger.kernel.org; net...@vger.kernel.org; linux-
> u...@vger.kernel.org; pali.ro...@gmail
On Fri, 3 Jun 2016, Chung-Geol Kim wrote:
> Yes, you are right, The presentational errors in order to obtain an
> understanding of the process.
> Therefore, I will be happy to explain again the diagrammatic representation
> as shown below.
> If using usb 3.0 storage(OTG), you can see as below.
>
On Fri, 3 Jun 2016, Krzysztof Opasiak wrote:
> On 06/02/2016 03:22 PM, Sudip Mukherjee wrote:
> > We have been dereferencing udc before checking it. Lets use it after it
> > has been checked.
> >
>
> To be honest I have mixed feelings about this patch.
>
> On one hand it prevents us from derefe
phy-sun4i-usb now has proper dr_mode handling, it always registers an
extcon, and sends a notify with the mode (even when in peripheral- /
host-only mode) at least once.
So we can simply the sunxi musb glue by always registering its extcon
notifier and relying on sunxi_musb_work() to enable vbus w
The A31 companion pmic (axp221) does not generate vbus change interrupts
when the board is driving vbus, so we must poll when using the pmic for
vbus-det _and_ we're driving vbus.
Signed-off-by: Hans de Goede
---
Changes in v2:
-No changes
---
drivers/phy/phy-sun4i-usb.c | 34 +++
Use the new of_usb_get_dr_mode_by_phy() function to get the dr_mode
from the musb controller node instead of assuming that having an id_det
gpio means otg mode, and not having one means host mode.
Implement peripheral-only mode by adding a sun4i_usb_phy0_get_id_det
helper which looks at the dr_mod
Some SoCs have a single phy-hw-block with multiple phys, this is
modelled by a single phy dts node, so we end up with multiple
controller nodes with a phys property pointing to the phy-node
of the otg-phy.
Only one of these controllers typically is an otg controller, yet we
were checking the first
On 06/03/2016 06:21 AM, Heikki Krogerus wrote:
Hi,
On Thu, Jun 02, 2016 at 09:12:19AM -0700, Guenter Roeck wrote:
On Thu, Jun 02, 2016 at 01:18:53PM +0300, Heikki Krogerus wrote:
On Wed, Jun 01, 2016 at 04:29:26PM -0700, Guenter Roeck wrote:
On Wed, Jun 01, 2016 at 11:26:09AM +0200, Oliver Ne
On 31/05/16 07:52, Chunfeng Yun wrote:
add a DT binding doc for MediaTek USB3 DRD driver
Signed-off-by: Chunfeng Yun
---
Documentation/devicetree/bindings/usb/mtu3.txt | 85
1 file changed, 85 insertions(+)
create mode 100644 Documentation/devicetree/bindings/u
Le 03/06/2016 11:22, Yang, Wenyou a écrit :
>> -Original Message-
>> From: Rob Herring [mailto:r...@kernel.org]
>> Sent: 2016年6月3日 9:54
>> To: Yang, Wenyou
>> Cc: Alan Stern ; Greg Kroah-Hartman
>> ; Ferre, Nicolas ;
>> Pawel Moll ; Mark Brown ; Ian
>> Campbell ; Kumar Gala ;
>> Alexandre
Hi,
On Thu, Jun 02, 2016 at 09:12:19AM -0700, Guenter Roeck wrote:
> On Thu, Jun 02, 2016 at 01:18:53PM +0300, Heikki Krogerus wrote:
> > On Wed, Jun 01, 2016 at 04:29:26PM -0700, Guenter Roeck wrote:
> > > On Wed, Jun 01, 2016 at 11:26:09AM +0200, Oliver Neukum wrote:
> > > > On Thu, 2016-05-19 a
Hi,
On 03-06-16 15:12, Bin Liu wrote:
Hi,
On Fri, Jun 03, 2016 at 01:39:26PM +0200, Hans de Goede wrote:
Hi,
On 03-06-16 13:20, Kishon Vijay Abraham I wrote:
Hi,
On Thursday 02 June 2016 11:01 PM, Hans de Goede wrote:
Some SoCs have a single phy-hw-block with multiple phys, this is
modelle
Hi,
On Fri, Jun 03, 2016 at 01:39:26PM +0200, Hans de Goede wrote:
> Hi,
>
> On 03-06-16 13:20, Kishon Vijay Abraham I wrote:
> >Hi,
> >
> >On Thursday 02 June 2016 11:01 PM, Hans de Goede wrote:
> >>Some SoCs have a single phy-hw-block with multiple phys, this is
> >>modelled by a single phy dts
Hi,
On 03-06-16 15:04, Bin Liu wrote:
Hi,
On Fri, Jun 03, 2016 at 12:34:35PM +0200, Hans de Goede wrote:
Hi,
On 02-06-16 20:16, Bin Liu wrote:
Hi,
On Thu, Jun 02, 2016 at 07:31:03PM +0200, Hans de Goede wrote:
Some SoCs have a single phy-hw-block with multiple phys, this is
modelled by a s
Hi,
On Fri, Jun 03, 2016 at 12:34:35PM +0200, Hans de Goede wrote:
> Hi,
>
> On 02-06-16 20:16, Bin Liu wrote:
> >Hi,
> >
> >On Thu, Jun 02, 2016 at 07:31:03PM +0200, Hans de Goede wrote:
> >>Some SoCs have a single phy-hw-block with multiple phys, this is
> >>modelled by a single phy dts node, s
Hi,
[auto build test ERROR on balbi-usb/next]
[also build test ERROR on v4.7-rc1 next-20160603]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Baolin-Wang/usb-dwc3-host-Set-the-dma_ops-for-xhci
On 06/03/2016 04:02 AM, Rob Herring wrote:
> On Wed, Jun 01, 2016 at 10:02:15AM +0200, Krzysztof Kozlowski wrote:
>> Some devices need real hard-reset by cutting the power. During power
>> sequence turn off and on the regulator, if it is provided.
>>
>> Additionally add support for instantiating t
>On Fri, 27 May 2016, Chung-Geol Kim wrote:
>
>> >On Fri, May 27, 2016 at 01:38:17AM +, Chung-Geol Kim wrote:
>> >> There is a double free problem in the usb driver.
>> >
>> >Which driver?
>> When I using the USB OTG Storage, this issue happened.
>> When remove the OTG Storage, it reproduced so
It will be failed when xhci device set the dma mask, if the xhci device
dma_ops is dummy. Thus set the xhci device dma_ops from the parent device.
Signed-off-by: Baolin Wang
---
drivers/usb/dwc3/host.c |3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/usb/dwc3/host.c b/drivers/us
Hi,
On 03-06-16 13:20, Kishon Vijay Abraham I wrote:
Hi,
On Thursday 02 June 2016 11:01 PM, Hans de Goede wrote:
Some SoCs have a single phy-hw-block with multiple phys, this is
modelled by a single phy dts node, so we end up with multiple
controller nodes with a phys property pointing to the
Hi,
On Thursday 02 June 2016 11:01 PM, Hans de Goede wrote:
> Some SoCs have a single phy-hw-block with multiple phys, this is
> modelled by a single phy dts node, so we end up with multiple
> controller nodes with a phys property pointing to the phy-node
> of the otg-phy.
Maybe we should try to
The first read on an Alea takes about 1.8 seconds, more than the
timeout value waiting for the read. As a consequence, later URB reuse
causes the warning given below. To avoid this, we increase the wait
time for the first read on the Alea.
[ 78.293247] WARNING: CPU: 3 PID: 1892 at drivers/usb/
Two patches to add support for the Araneus Alea I USB RNG to the
chaoskey driver. The first simply includes the Alea I as a device,
the second fixes an issue with the timeout on the first read.
Bob Ham (2):
hwrng: chaoskey - Add support for Araneus Alea I USB RNG
hwrng: chaoskey - Fix URB war
Adds support for the Araneus Alea I USB hardware Random Number
Generator which is interfaced with in exactly the same way as the
Altus Metrum ChaosKey. We just add the appropriate device ID and
modify the config help text.
Signed-off-by: Bob Ham
---
drivers/usb/misc/Kconfig| 11 ++-
Hi,
John Youn writes:
This reverts back to the original buggy behavior. This will fail when
a SET_INTERFACE occurs multiple times.
You can run testusb to see the failure:
testusb -t 9 -c 5000 -s 2048 -a
>>>
>>> I came up with something else for this. It's still unstable
Hi,
On 02-06-16 20:16, Bin Liu wrote:
Hi,
On Thu, Jun 02, 2016 at 07:31:03PM +0200, Hans de Goede wrote:
Some SoCs have a single phy-hw-block with multiple phys, this is
modelled by a single phy dts node, so we end up with multiple
controller nodes with a phys property pointing to the phy-node
Mario Limonciello [mailto:mario_limoncie...@dell.com]
> Sent: Friday, June 03, 2016 12:58 AM
[...]
> @@ -500,6 +502,7 @@ enum rtl8152_flags {
> SELECTIVE_SUSPEND,
> PHY_RESET,
> SCHEDULE_NAPI,
> + MAC_PASSTHRU = 0,
I don't think you have to give this a value.
> };
>
[...]
On Fri, Jun 03, 2016 at 11:16:32AM +0300, Heikki Krogerus wrote:
> On Fri, Jun 03, 2016 at 03:41:13PM +0800, Peter Chen wrote:
> > On Thu, Jun 02, 2016 at 09:37:24AM +0800, Lu Baolu wrote:
> > > Several Intel platforms implement USB dual role by having completely
> > > separate xHCI and dwc3 IPs in
mario_limoncie...@dell.com [mailto:mario_limoncie...@dell.com]
> Sent: Friday, June 03, 2016 12:58 AM
[...]
> > Why generate a random one and not just use the one that the network
> > controler already provides?
>
> That's how the flow works in r8152 already and I'm not overriding it.
> Again, I'l
> -Original Message-
> From: Rob Herring [mailto:r...@kernel.org]
> Sent: 2016年6月3日 9:54
> To: Yang, Wenyou
> Cc: Alan Stern ; Greg Kroah-Hartman
> ; Ferre, Nicolas ;
> Pawel Moll ; Mark Brown ; Ian
> Campbell ; Kumar Gala ;
> Alexandre Belloni ; linux-
> ker...@vger.kernel.org; devicet...
On May 28 2016 or thereabouts, Heiner Kallweit wrote:
> Am 27.05.2016 um 23:45 schrieb Benjamin Tissoires:
> > On May 27 2016 or thereabouts, Heiner Kallweit wrote:
> >> The Riso Kagaku Webmail Notifier (and its clones) is supported as part of
> >> usb/misc/usbled driver currently. This patch migra
On 06/02/2016 03:22 PM, Sudip Mukherjee wrote:
> We have been dereferencing udc before checking it. Lets use it after it
> has been checked.
>
To be honest I have mixed feelings about this patch.
On one hand it prevents us from dereferencing potential NULL ptr what is
generally good. But on th
On Fri, Jun 03, 2016 at 03:41:13PM +0800, Peter Chen wrote:
> On Thu, Jun 02, 2016 at 09:37:24AM +0800, Lu Baolu wrote:
> > Several Intel platforms implement USB dual role by having completely
> > separate xHCI and dwc3 IPs in PCH or SOC silicons. These two IPs share
> > a single USB port. There is
On Thu, Jun 02, 2016 at 09:37:24AM +0800, Lu Baolu wrote:
> Several Intel platforms implement USB dual role by having completely
> separate xHCI and dwc3 IPs in PCH or SOC silicons. These two IPs share
> a single USB port. There is another external port mux which controls
> where the data lines sho
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