On Fri, Oct 24, 2014 at 10:14:12AM -0500, Felipe Balbi wrote:
> Hi Greg,
>
> Here's our first set of fixes for v3.18-rc cycle.
>
> Quite a few goodies here but the most important is that most gadget drivers
> (except for g_hid, g_midi and g_webcam) pass USB[23]0CV with MUSB and DWC3.
>
> All pat
> From: Marek Szyprowski [mailto:m.szyprow...@samsung.com]
> Sent: Monday, October 20, 2014 3:46 AM
>
> This patch adds a call to s3c_hsotg_disconnect() from 'end session'
> interrupt (GOTGINT_SES_END_DET) to correctly notify gadget subsystem
> about unplugged usb cable. 'disconnected' interrupt (
> From: Marek Szyprowski [mailto:m.szyprow...@samsung.com]
> Sent: Monday, October 20, 2014 3:46 AM
>
> Suspend/resume code assumed that the gadget was always enabled and
> connected to usb bus. This means that the actual state of the gadget
> (soft-enabled/disabled or connected/disconnected) was
> From: Marek Szyprowski [mailto:m.szyprow...@samsung.com]
> Sent: Monday, October 20, 2014 3:46 AM
>
> This patch moves calls to phy enable/disable out of spinlock protected
> blocks in device suspend/resume to fix incorrect caller context. Phy
> related functions must not be called from atomic c
> From: Marek Szyprowski [mailto:m.szyprow...@samsung.com]
> Sent: Monday, October 20, 2014 3:46 AM
>
> This patch moves udc initialization from pullup() method to
> s3c_hsotg_udc_start(), so that method ends with hardware fully
> initialized and left in soft-disconnected state. After this change,
> From: Marek Szyprowski [mailto:m.szyprow...@samsung.com]
> Sent: Monday, October 20, 2014 3:46 AM
>
> This patch moves phy enable/disable calls from pullup() method to
> udc_start/stop functions. This solves the issue related to limited caller
> context for PHY functions, because they cannot be
> From: Marek Szyprowski [mailto:m.szyprow...@samsung.com]
> Sent: Monday, October 20, 2014 3:46 AM
>
> This patch changes s3c_hsotg_core_init function to leave hardware in
> soft disconnect mode, so the moment of coupling the hardware to the usb
> bus can be later controlled by the separate funct
> From: Marek Szyprowski [mailto:m.szyprow...@samsung.com]
> Sent: Monday, October 20, 2014 3:46 AM
>
> This patch removes duplicated code and sets last_rst variable in the
> function which does the hardware reset.
>
> Signed-off-by: Marek Szyprowski
> ---
> drivers/usb/dwc2/gadget.c | 5 ++---
> -Original Message-
> From: Marek Szyprowski [mailto:m.szyprow...@samsung.com]
> Sent: Monday, October 20, 2014 3:46 AM
>
> Excessive debug messages might cause timing issues that prevent correct
> usb enumeration. This patch hides information about USB bus reset to let
> driver enumera
Hi,
On Sat, Oct 25, 2014 at 01:01:28AM +0800, Huang Rui wrote:
> On Fri, Oct 17, 2014 at 09:48:59AM -0500, Felipe Balbi wrote:
> > On Fri, Oct 17, 2014 at 04:53:32PM +0800, Huang Rui wrote:
> > > When parameter DWC_USB3_LPM_ERRATA_ENABLE is enabled in Andvanced
> > > Configuration
> > > of coreCo
On Fri, Oct 17, 2014 at 09:48:59AM -0500, Felipe Balbi wrote:
> On Fri, Oct 17, 2014 at 04:53:32PM +0800, Huang Rui wrote:
> > When parameter DWC_USB3_LPM_ERRATA_ENABLE is enabled in Andvanced
> > Configuration
> > of coreConsultant, it supports of xHCI BESL Errata Dated 10/19/2011 is
> > enabled
On Fri, Oct 17, 2014 at 04:53:27PM +0800, Huang Rui wrote:
> The dwc3 controller is the PCI-E device in AMD NL platform, but the class code
> of PCI header is 0x0c0330, the same with xHC. That's because it needs to meet
> the windows enviroment. The dwc3 controller acted as only host mode to bind
Hi,
On Mon, Oct 20, 2014 at 11:38:23PM +0800, Huang Rui wrote:
> On Fri, Oct 17, 2014 at 10:10:26AM -0500, Felipe Balbi wrote:
> > Hi,
> >
> > On Fri, Oct 17, 2014 at 04:53:25PM +0800, Huang Rui wrote:
> > > The series of patches add AMD NL SoC support for DesignWare USB3 OTG
> > > IP with PCI bu
On Mon, Oct 20, 2014 at 05:01:25PM +0800, Huang Rui wrote:
> On Mon, Oct 20, 2014 at 04:41:54PM +0800, Huang Rui wrote:
> > On Fri, Oct 17, 2014 at 01:48:19PM -0500, Felipe Balbi wrote:
> > > Hi,
> > >
> > > On Fri, Oct 17, 2014 at 06:41:04PM +, Paul Zimmerman wrote:
> > > > > From: Felipe Bal
Hi,
On Mon, Oct 20, 2014 at 04:41:54PM +0800, Huang Rui wrote:
> On Fri, Oct 17, 2014 at 01:48:19PM -0500, Felipe Balbi wrote:
> > Hi,
> >
> > On Fri, Oct 17, 2014 at 06:41:04PM +, Paul Zimmerman wrote:
> > > > From: Felipe Balbi [mailto:ba...@ti.com]
> > > > Sent: Friday, October 17, 2014 8:
On Mon, Oct 20, 2014 at 02:38:28PM +0800, Huang Rui wrote:
> On Fri, Oct 17, 2014 at 09:45:32AM -0500, Felipe Balbi wrote:
> > Hi,
> >
> > On Fri, Oct 17, 2014 at 04:53:31PM +0800, Huang Rui wrote:
> > > AMD NL fpga needs to enable disscramble quirk. And this quirk doesn't
> > > need on
> > > the
On Mon, Oct 20, 2014 at 02:43:31PM +0800, Huang Rui wrote:
> On Fri, Oct 17, 2014 at 09:50:00AM -0500, Felipe Balbi wrote:
> > Hi,
> >
> > On Fri, Oct 17, 2014 at 04:53:33PM +0800, Huang Rui wrote:
> > > AMD NL needs to enable u2exit lfps quirk.
> > >
> > > Signed-off-by: Huang Rui
> > > ---
> >
On Mon, Oct 20, 2014 at 02:02:17PM +0800, Huang Rui wrote:
> On Fri, Oct 17, 2014 at 09:41:44AM -0500, Felipe Balbi wrote:
> > HI,
> >
> > On Fri, Oct 17, 2014 at 04:53:30PM +0800, Huang Rui wrote:
> > > This patch adds a quirks flag at dwc3 structure, and SoCs platform vendor
> > > is
> > > able
On 24 Oct 2014, Johan Hovold told this:
> [ +CC: linux-usb ]
> On Wed, Oct 22, 2014 at 04:36:59PM +0100, Nix wrote:
>> On 22 Oct 2014, Johan Hovold outgrape:
>>
>> > On Wed, Oct 22, 2014 at 10:31:17AM +0100, Nix wrote:
>> >> On 14 Oct 2014, Johan Hovold verbalised:
>> >>
>> >> > On Sun, Oct 12,
Hi Greg,
Here's our first set of fixes for v3.18-rc cycle.
Quite a few goodies here but the most important is that most gadget drivers
(except for g_hid, g_midi and g_webcam) pass USB[23]0CV with MUSB and DWC3.
All patches have been tested for weeks (since v3.18 merge window opened) and
they hav
Hi,
On Fri, Oct 24, 2014 at 12:50:44PM +0900, Anton Tikhomirov wrote:
> > > > > > dwc3_ep0_stall_and_restart(dwc);
> > > > > > } else {
> > > > > > - /*
> > > > > > -* handle the case where we have to send a zero
> > packet.
> > > > > This
> > > > > > -
[ +CC: linux-usb ]
On Wed, Oct 22, 2014 at 04:36:59PM +0100, Nix wrote:
> On 22 Oct 2014, Johan Hovold outgrape:
>
> > On Wed, Oct 22, 2014 at 10:31:17AM +0100, Nix wrote:
> >> On 14 Oct 2014, Johan Hovold verbalised:
> >>
> >> > On Sun, Oct 12, 2014 at 10:36:30PM +0100, Nix wrote:
> >> >> I hav
Enable HS-USB device for the Koelsch board, defining the GPIO that the driver
should check when probing (which is the ID output from MAX3355 OTG chip).
Note that there will be pinctrl-related error messages if both internal PCI
and HS-USB drivers are enabled but they should be just ignored.
Signe
Enable HS-USB device for the Henninger board, defining the GPIO that the driver
should check when probing (which is the ID output from MAX3355 OTG chip).
Note that there will be pinctrl-related error messages if both internal PCI
and HS-USB drivers are enabled but they should be just ignored.
Sig
Here's the set of 3 patches against Simon Horman's 'renesas.git' repo,
'renesas-devel-20141024-v3.18-rc1' tag. Here we add the HS-USB device tree
support on the R8A7791/Koelsch/Henninger reference boards. The patchset
requires the USB PHY driver (already merg
Define the R8A7791 generic part of the HS-USB device node. It is up to the board
file to enable the device.
Signed-off-by: Yoshihiro Shimoda
[Sergei: fixed summary, added changelog]
Signed-off-by: Sergei Shtylyov
---
arch/arm/boot/dts/r8a7791.dtsi | 11 +++
1 file changed, 11 insertio
Define the R8A7790 generic part of the HS-USB device node.
It is up to the board file to enable the device.
Signed-off-by: Yoshihiro Shimoda
[Sergei: fixed summary, added changelog]
Signed-off-by: Sergei Shtylyov
---
arch/arm/boot/dts/r8a7790.dtsi | 11 +++
1 file changed, 11 insertio
Enable HS-USB device for the Lager board, defining the GPIO that the driver
should check when probing. Since this board doesn't have the OTG ID pin, we
assume that GP5_18 (USB0_PWEN) is an ID pin because it is 1 when the SW5 is
in position 2-3 (meaning USB function) and 0 in other positions.
Note
Here's the set of 2 patches against Simon Horman's 'renesas.git' repo,
'renesas-devel-20141024-v3.18-rc1' tag. Here we add the HS-USB device tree
support on the R8A7790/Lager reference board. The patchset requires the USB PHY
driver (already merged by Kishon and Gre
Signed-off-by: Yoshihiro Shimoda
---
arch/arm/boot/dts/r8a7791.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 74f18d8..1f4b6db 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.
This patch is based on Simon's renesas.git branch and
renesas-devel-20141024-v3.18-rc1 tag.
Since koelsch and henninger doesn't have a USB3.0 connector,
I submit a patch for r8a7791.dtsi only.
Changes from v1:
- rebase the repository.
Yoshihiro Shimoda (1):
ARM: shmobile: r8a7791:
Since the PHY of USB3.0 and EHCI/OHCI ch2 are the same, the USB3.0
driver cannot use the phy driver when the EHCI/OHCI ch2 already used it:
phy phy-e6590100.usb-phy.3: phy init failed --> -16
xhci-hcd: probe of ee00.usb failed with error -16
If so, we have to unbind the EHCI/OHCI ch2, and the
Signed-off-by: Yoshihiro Shimoda
---
arch/arm/boot/dts/r8a7790.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 3f1e4b3..776f1c4 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.
This series is based on Simon's renesas.git branch and
renesas-devel-20141024-v3.18-rc1 tag. If we use the generic phy
driver for R-Car Gen2 (drivers/phy/phy-rcar-gen2.c), we can use
the USB3.0 on lager.
Changes from v1:
- rebase the repository.
Yoshihiro Shimoda (2):
ARM: shmobile: r8
34 matches
Mail list logo
