RE: [PATCH 5/5] megaraid_sas: add mmio barrier after register writes

2016-11-29 Thread Kashyap Desai
ecke > Subject: Re: [PATCH 5/5] megaraid_sas: add mmio barrier after register > writes > > On 18.11.2016 17:48, Kashyap Desai wrote: > >> -Original Message- > >> From: linux-scsi-ow...@vger.kernel.org [mailto:linux-scsi- > >> ow...@vger.kernel.org] On Behalf

Re: [PATCH 5/5] megaraid_sas: add mmio barrier after register writes

2016-11-21 Thread Tomas Henzl
ersen >> Cc: Christoph Hellwig; James Bottomley; Sumit Saxena; linux- >> s...@vger.kernel.org; Hannes Reinecke >> Subject: Re: [PATCH 5/5] megaraid_sas: add mmio barrier after register > writes >> On 11.11.2016 10:44, Hannes Reinecke wrote: >>> The megaraid_sas HB

RE: [PATCH 5/5] megaraid_sas: add mmio barrier after register writes

2016-11-18 Thread Kashyap Desai
Saxena; linux- > s...@vger.kernel.org; Hannes Reinecke > Subject: Re: [PATCH 5/5] megaraid_sas: add mmio barrier after register writes > > On 11.11.2016 10:44, Hannes Reinecke wrote: > > The megaraid_sas HBA only has a single register for I/O submission, > > which will be hit pretty

Re: [PATCH 5/5] megaraid_sas: add mmio barrier after register writes

2016-11-18 Thread Tomas Henzl
On 11.11.2016 10:44, Hannes Reinecke wrote: > The megaraid_sas HBA only has a single register for I/O submission, > which will be hit pretty hard with scsi-mq. To ensure that the > PCI writes have made it across we need to add a mmio barrier > after each write; otherwise I've been seeing spurious c

RE: [PATCH 5/5] megaraid_sas: add mmio barrier after register writes

2016-11-11 Thread Sumit Saxena
/5] megaraid_sas: add mmio barrier after register writes > >The megaraid_sas HBA only has a single register for I/O submission, which will be >hit pretty hard with scsi-mq. To ensure that the PCI writes have made it across we >need to add a mmio barrier after each write; otherwise I

[PATCH 5/5] megaraid_sas: add mmio barrier after register writes

2016-11-11 Thread Hannes Reinecke
The megaraid_sas HBA only has a single register for I/O submission, which will be hit pretty hard with scsi-mq. To ensure that the PCI writes have made it across we need to add a mmio barrier after each write; otherwise I've been seeing spurious command completions and I/O stalls. Signed-off-by: H