On Tue, Feb 27, 2018 at 9:24 PM, James Smart wrote:
> On 2/27/2018 12:15 PM, Arnd Bergmann wrote:
>>
>> Could you add an #ifdef and comment around the 'if (q->dpp_enable ...)'
>> block then to make sure that if anybody tries to make it work on other
>> architectures, they are aware of the problem?
On 2/27/2018 12:15 PM, Arnd Bergmann wrote:
Could you add an #ifdef and comment around the 'if (q->dpp_enable ...)'
block then to make sure that if anybody tries to make it work on other
architectures, they are aware of the problem?
the ifdef is around the area where wc is enabled. I'd prefer n
On Tue, Feb 27, 2018 at 7:05 PM, James Smart wrote:
> On 2/27/2018 12:58 AM, Arnd Bergmann wrote:
>
> So you point out a very real concern, as in most cases the source buffer is
> a bytestream and the desire is to send the bytestream in the same byte order
> as in memory. It turns out we're somew
On 2/27/2018 12:58 AM, Arnd Bergmann wrote:
What you are describing above is not a byte stream but dealing with
a 64-bit integer. In both cases you obviously end up with the destination
data being 0x05 0x00 0x00 0x00 0x00 0x00 0x00 0x00, there is no
difference.
The case that you have in the driv
On Mon, Feb 26, 2018 at 10:41 PM, James Smart wrote:
> On 2/26/2018 12:04 PM, Arnd Bergmann wrote:
>>
>> For the endianess, the key to understanding this is that readl/writel and
>> readq/writeq follow the convention of accessing data as little-endian
>> because
>> that is what 99% of MMIO accesse
On 2/26/2018 12:04 PM, Arnd Bergmann wrote:
For the endianess, the key to understanding this is that readl/writel and
readq/writeq follow the convention of accessing data as little-endian because
that is what 99% of MMIO accesses on PCI are: you have a 32-bit or 64-bit
register value that gets co
On Mon, Feb 26, 2018 at 6:01 PM, James Smart wrote:
>
>
> On 2/26/2018 12:36 AM, Arnd Bergmann wrote:
>>
>> Unfortunately, this is still broken on all big-endian architectures. You
>> could
>> use __raw_writeq() here to fix it, or change the if() clause at the
>> beginning
>> to include '!IS_ENABL
On 2/26/2018 12:36 AM, Arnd Bergmann wrote:
Unfortunately, this is still broken on all big-endian architectures. You could
use __raw_writeq() here to fix it, or change the if() clause at the beginning
to include '!IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)' to avoid that.
Arnd
Please explain
On Sat, Feb 24, 2018 at 11:30 PM, James Smart wrote:
> writeq() is not present on all 32-bit architectures.
>
> When 32-bit, use writel()
>
> Signed-off-by: Dick Kennedy
> Signed-off-by: James Smart
> ---
> drivers/scsi/lpfc/lpfc_sli.c | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git
Looks good,
Reviewed-by: Johannes Thumshirn
--
Johannes Thumshirn Storage
jthumsh...@suse.de+49 911 74053 689
SUSE LINUX GmbH, Maxfeldstr. 5, 90409 Nürnberg
GF: Felix Imendörffer, Jane Smithard, Graham Norton
HRB 21284 (AG N
writeq() is not present on all 32-bit architectures.
When 32-bit, use writel()
Signed-off-by: Dick Kennedy
Signed-off-by: James Smart
---
drivers/scsi/lpfc/lpfc_sli.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/scsi/lpfc/lpfc_sli.c b/drivers/scsi/lpfc/lpfc_sli.c
index 4ce3
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